Chip-level CMP Modeling and Smart Dummy for HDP and Conformal CVD Films

(2) Conexant Systems Inc.); George Yong Liu (1); Inc.; Kelvin Hsu (1); Lawrence Camilletti (2) ((1) CMP Technology; Ray F. Zhang (1)

arxiv: cs/0011014 · v1 · submitted 2000-11-09 · 💻 cs.CE

Chip-level CMP Modeling and Smart Dummy for HDP and Conformal CVD Films

George Yong Liu (1) , Ray F. Zhang (1) , Kelvin Hsu (1) , Lawrence Camilletti (2) ((1) CMP Technology , Inc. , (2) Conexant Systems Inc.) This is my paper

classification 💻 cs.CE

keywords dummyfilmchip-levelconformalfillingmodelingresultssmart

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Chip-level CMP modeling is investigated to obtain the post-CMP film profile thickness across a die from its design layout file and a few film deposition and CMP parameters. The work covers both HDP and conformal CVD film. The experimental CMP results agree well with the modeled results. Different algorithms for filling of dummy structure are compared. A smart algorithm for dummy filling is presented, which achieves maximal pattern-density uniformity and CMP planarity.

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Chip-level CMP Modeling and Smart Dummy for HDP and Conformal CVD Films

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