A Cost-Efficient Look-Up Table Based Binary Coded Decimal Adder Design

Hafiz Md. Hasan Babu; Lafifa Jamal; Mubin Ul Haque; Zarrin Tasnim Sworna

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A Cost-Efficient Look-Up Table Based Binary Coded Decimal Adder Design

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arxiv 2203.09665 v1 pith:5IAJQX2I submitted 2022-03-18 cs.AR

Zarrin Tasnim Sworna , Mubin Ul Haque , Hafiz Md. Hasan Babu , Lafifa Jamal This is my paper · ORCID

classification cs.AR

keywords adderbinarycodeddecimaldesignlook-uptableaccurate

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The BCD (Binary Coded Decimal) being the more accurate and human-readable representation with ease of conversion, is prevailing in the computing and electronic communication.In this paper, a tree-structured parallel BCD addition algorithm is proposed with the reduced time complexity. BCD adder is more effective with a LUT (Look-Up Table)-based design, due to FPGA (Field Programmable Gate Array) technology's enumerable benefits and applications. A size-minimal and depth-minimal LUT-based BCD adder circuit construction is the main contribution of this paper.

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