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Performance of the Vipera framework for DSLs on micro-core architectures

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arxiv 2209.00894 v1 pith:4X2MCJKA submitted 2022-09-02 cs.DC cs.PL

classification cs.DCcs.PL
keywords architecturescodeperformanceviperaframeworkmicro-coresizecompiler
verification ladder T0 review T1 audit T2 compute T3 formal
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Vipera provides a compiler and runtime framework for implementing dynamic Domain-Specific Languages on micro-core architectures. The performance and code size of the generated code is critical on these architectures. In this paper we present the results of our investigations into the efficiency of Vipera in terms of code performance and size.

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