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Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks

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arxiv 2303.08256 v2 pith:IX23A4HV submitted 2023-03-14 cs.AR

classification cs.AR
keywords reasoninggamorafunctionalmappingnetworkstechnologyaccuracyboolean
verification ladder T0 review T1 audit T2 compute T3 formal

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Reasoning high-level abstractions from bit-blasted Boolean networks (BNs) such as gate-level netlists can significantly benefit functional verification, logic minimization, datapath synthesis, malicious logic identification, etc. Mostly, conventional reasoning approaches leverage structural hashing and functional propagation, suffering from limited scalability and inefficient usage of modern computing power. In response, we propose a novel symbolic reasoning framework exploiting graph neural networks (GNNs) and GPU acceleration to reason high-level functional blocks from gate-level netlists, namely Gamora, which offers high reasoning performance w.r.t exact reasoning algorithms, strong scalability to BNs with over 33 million nodes, and generalization capability from simple to complex designs. To further demonstrate the capability of Gamora, we also evaluate its reasoning performance after various technology mapping options, since technology-dependent optimizations are known to make functional reasoning much more challenging. Experimental results show that (1) Gamora reaches almost 100% and over 97% reasoning accuracy for carry-save-array (CSA) and Booth-encoded multipliers, respectively, with up to six orders of magnitude speedups compared to the state-of-the-art implementation in the ABC framework; (2) Gamora maintains high reasoning accuracy (>92%) in finding functional modules after complex technology mapping, upon which we comprehensively analyze the impacts on Gamora reasoning from technology mapping.

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Cited by 1 Pith paper

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  1. OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis

    cs.AI 2024-11 conditional novelty 6.0 of 10

    OpenLS-DGF generates and packages a 966k-circuit multi-task logic synthesis dataset from 46 designs, demonstrated on four ML tasks with high reported accuracy.

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