Pith. sign in

Paper Citation Record · LEDGER

Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge

As of 21 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2401.01141.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2401.01141 v1

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 2 of 2 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-21T06:32:19.484+00:00

measured 2 of 2 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-10T20:34:48.802598Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-05-13T04:27:14.204294Z

Reference resolution

0 of 0 outbound references displayed

  • verified exact0
  • verified fuzzy0
  • unresolved0
  • parse uncertain0
  • malformed identifier0
  • metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation cec1a921-aa00-4414-987e-55391ecd8367 · inbound

Spiking Neural Network Accelerator Architecture for Differential-Time Representation using Learned Encoding cites this paper.

Spiking Neural Network Accelerator Architecture for Differential-Time Representation using Learned Encoding Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge

Reference 17

Resolution
unresolved
no resolver link, observed 2026-08-10T20:34:48.802598Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

source=pdf_text observed=2026-08-10T20:34:48.802598Z digest=sha256:d50e248dd1bc71a78d71813d612624a64122bbd671e22b4931274e1ca151ff4b

Observation 0c8fee12-43a7-445a-99c4-92f2675a6f3e · inbound

Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA cites this paper.

Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge

Reference 6

Resolution
verified exact
arxiv_id, observed 2026-05-13T04:27:14.206046Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.

source=pdf_text observed=2026-05-13T04:26:16.332460Z digest=sha256:97c04e2f75fdffef3a01030fc5db86b19f7f2fbcaed2591698c04a23e0f52932