Paper Citation Record · LEDGER

1-bit AI Infra: Part 1.1, Fast and Lossless BitNet b1.58 Inference on CPUs

As of 19 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 4 inbound Pith citation observations for arXiv:2410.16144.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2410.16144 v2

Coverage vector

measured 0 of 0 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links

measured 4 of 4 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 4 of 4 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-11T04:39:36.716036Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: arxiv_reference, observed 2026-05-16T06:37:28.966858Z

Reference resolution

0 of 0 outbound references displayed

verified exact0
verified fuzzy0
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

No outbound reference observations are available for this paper version.

Pith citing papers

Observation d1c6e3e3-1bf0-4176-ab3d-c2012598070f · inbound

1.58-bit FLUX cites this paper.

1.58-bit FLUX 1-bit AI Infra: Part 1.1, Fast and Lossless BitNet b1.58 Inference on CPUs

Reference 52

Resolution: unresolved; no resolver link, observed 2026-08-11T04:39:36.716036Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 991c5ec3-a5f0-4fb7-aa79-8b19e4551e84 · inbound

D-Legion: A Scalable Many-Core Architecture for Accelerating Matrix Multiplication in Quantized LLMs cites this paper.

D-Legion: A Scalable Many-Core Architecture for Accelerating Matrix Multiplication in Quantized LLMs 1-bit AI Infra: Part 1.1, Fast and Lossless BitNet b1.58 Inference on CPUs

Reference 29

Resolution: verified exact; arxiv_id, observed 2026-05-16T06:37:28.969693Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation 604670b2-bd7a-41d0-a79b-b5c926d7f09a · inbound

LOCALUT: Harnessing Capacity-Computation Tradeoffs for LUT-Based Inference in DRAM-PIM cites this paper.

LOCALUT: Harnessing Capacity-Computation Tradeoffs for LUT-Based Inference in DRAM-PIM 1-bit AI Infra: Part 1.1, Fast and Lossless BitNet b1.58 Inference on CPUs

Reference 92

Resolution: verified exact; arxiv_id, observed 2026-05-10T22:15:49.616930Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.

Observation f6c74128-d4f1-4232-a060-01a243e5e4c8 · inbound

VitaLLM: A Versatile, Ultra-Compact Ternary LLM Accelerator with Dependency-Aware Scheduling cites this paper.

VitaLLM: A Versatile, Ultra-Compact Ternary LLM Accelerator with Dependency-Aware Scheduling 1-bit AI Infra: Part 1.1, Fast and Lossless BitNet b1.58 Inference on CPUs

Reference 4

Resolution: verified exact; arxiv_id, observed 2026-05-12T09:51:27.263499Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.