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Skipped Adjacency Pulse Width Modulation: Zero Voltage Switching over Full Duty Cycle Range for Hybrid Flying Capacitor Multi-Level Converters without Dynamic Level Changing

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arxiv 2411.06589 v2 pith:5KJT3HC4 submitted 2024-11-10 eess.SY cs.SY

classification eess.SYcs.SY
keywords dutyvoltagechangingconverterscyclehybridlevelmethod
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This paper proposes a method to achieve zero voltage switching (ZVS) across the full duty cycle range in hybrid flying capacitor multilevel (FCML) converters, eliminating the need for dynamic level changing and active re-balancing. Utilizing skipped adjacency pulse width modulation (SAPWM), this approach avoids the nearest pole voltage level, thereby increasing volt-seconds within specific duty cycle range. The method uses a modified PWM scheme, which preserves effective pole voltage by changing duty reference and employing digital logic processing. Simulation results verify the proposed method achieving full-range ZVS. This SAPWM technique is compatible with hybrid FCML converters with various levels, offering enhanced efficiency and reduced switching losses.

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Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. High-Bandwidth, Low-Computational Approach: Estimator-Based Control for Hybrid Flying Capacitor Multilevel Converters Using Multi-Cost Gradient Descent and State Feedforward

    eess.SY 2024-11 conditional novelty 6.0 of 10

    A hybrid feedback-plus-feedforward estimator enables flying capacitor voltage balancing in 6-level converters using only pole voltage, inductor current, and duty cycle, at low sampling rates.

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