REVIEW 3 major objections 6 minor 35 references
CKTSO: High-Performance Parallel Sparse Linear Solver for General Circuit Simulations
T0 review · 3 major / 6 minor · reviewed 2026-08-12 · deepseek-v4-flash
Pith's one-line read CKTSO claims a parallel sparse solver for SPICE that beats state-of-the-art solvers on a wide range of circuit matrices.
desk verdict A solid, honestly-scoped engineering paper on a parallel sparse solver for SPICE; the new triangular-solving and ordering contributions are real, but the headline speedup rests on the no-re-pivoting best case and the re-pivoting model is synthetic. read the letter →
The pith
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
The reading
What carries the argument
The central objects are the elimination graph (EGraph) and elimination tree (ETree). The EGraph encodes exact row-to-row dependencies for a fixed LU structure and is used to schedule fast factorization when that structure is guessed from the previous iteration; the ETree encodes a dependency upper bound that remains valid under any pivoting order and is used to restart factorization when a pivot check fails. A second mechanism is the structure-adaptive triangular partition, which splits the lower and upper triangular factors into a sparse block solved by levelized parallel rows plus a dense bottom-right region subdivided into rectangular slices solved in parallel and triangular pieces solved sequentially.
What would settle it
Run CKTSO on SPICE transient benchmarks with frequent abrupt nonlinear events, such as switching or clamping, and count re-pivot events per factorization. If average re-pivoting substantially exceeds the tested 10% rate, the reported average speedups should fall by about 20% or more; if a large fraction of matrices show re-pivoting in nearly every iteration, CKTSO's fast path reduces to the slower pivoting path and the central speed claim is falsified.
Extended reading notes
Core claim
The paper's central claim is that a sparse solver can be built specifically for circuit matrices that outperforms state-of-the-art general and circuit-oriented solvers by exploiting two structural facts: circuit matrices have a characteristic nonzero distribution, and values evolve smoothly across Newton-Raphson iterations. On that basis CKTSO proposes a fast LU factorization that assumes the previous EGraph remains valid, checks each pivot, and falls back to elimination-tree-scheduled factorization with pivoting only when a pivot fails; a hybrid ordering that selects the best of minimum-degree and nested dissection; and a triangular solver that splits L and U into sparse, rectangular, and dense triangular blocks solved with different parallel strategies. The experiments show CKTSO fastest for 50 of 56 benchmark matrices in factorization and 49 in triangular solving, with average 16-thread speedups of 5.9x over NICSLU and 11.9x over PARDISO, and 2.38x and 2.56x speedups in operating-point and transient SPICE simulations.
Load-bearing premise
The load-bearing premise is that circuit simulation matrices change smoothly enough between consecutive Newton-Raphson iterations that the previous pivoting order and LU structure remain valid in the large majority of iterations.
Editorial extensions
If this is right
- In benchmark tests on 56 circuit matrices, CKTSO's 16-thread fast LU factorization is on average 5.9x faster than NICSLU and 11.9x faster than PARDISO.
- For triangular solving, CKTSO is on average 1.37 to 2.89x faster than NICSLU's sequential solving across 1 to 16 threads.
- In SPICE operating-point simulations of nonlinear circuits, CKTSO with 16 threads finishes 2.38x faster than NICSLU on average; in transient simulations of linear circuits, it is 2.56x faster.
- Because pre-processing runs both minimum-degree and nested-dissection orderings and picks the one with fewer fill-ins, CKTSO produces fewer fill-ins than either method alone: 8.8% fewer than NICSLU and 62.3% fewer than PARDISO on average.
- Even in a synthetic general case where 10% of factorization runs require re-pivoting, the speedup over NICSLU drops only about 20%, indicating the fast path survives occasional pivot failures.
Reading between the lines
- Beyond the paper, the guess-the-EGraph-and-check-pivots strategy could apply to any solver embedded in a Newton-like loop where matrices evolve smoothly, such as power-flow or nonlinear PDE time stepping, since a pivot check plus ETree fallback gives it a safety net that plain re-factorization lacks.
- Beyond the paper, the triangular partition into a sparse block plus dense rectangular and triangular pieces suggests a natural mapping to heterogeneous hardware: the sparse part needs latency-hiding parallelism, while the dense bottom-right block could be handed to vectorized or GPU kernels.
- Beyond the paper, the decisive test is a benchmark of real nonlinear circuits with frequent sharp transients; the paper reports only 3 to 26 re-pivot events in its SPICE tests, so a broader sampling would show how often the smooth-change premise holds in practice.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. CKTSO is a parallel sparse direct solver designed for SPICE-style circuit matrices. Its main technical contributions are a combined minimum-degree/nested-dissection ordering, a "fast factorization with pivot check" that reuses a guessed elimination graph and falls back to ETree-scheduled factorization with pivoting when a pivot violation is detected, and a structure-adaptive hybrid parallel triangular solving method. The paper reports benchmark results on 56 SuiteSparse circuit matrices, showing fewer fill-ins and FLOPs than NICSLU and PARDISO, and SPICE operating-point/transient simulations reporting 2.38x and 2.56x average speedups respectively. The central claim is that CKTSO achieves better performance than state-of-the-art solvers for a wide range of circuit matrices.
Significance. If the claims hold, CKTSO represents a meaningful advance for circuit simulation: it directly targets the three known bottlenecks of sparse direct solvers in SPICE, namely ordering quality, parallel factorization scalability, and the notoriously sequential triangular solve. The algorithmic ideas are clearly specified, the evaluation is anchored on external SuiteSparse benchmarks and independent solvers, and the code is released, which are all strengths. The work is not circular: the speedups are measured against external solver implementations, and the fast factorization is a component integrated into a complete solver. However, the evidence is incomplete precisely where it matters for the headline claims: no numerical accuracy or residual comparison is reported, and the general-case re-pivoting evaluation uses a synthetic uniform-random model rather than data from actual circuit simulation iterations.
major comments (3)
- [Section VI] Numerical accuracy is never reported. The experimental section reports fill-in counts, FLOPs, and timings, but contains no residual norms, forward errors, or convergence-failure data for any of the 56 benchmark matrices. This is load-bearing because the core algorithmic contribution is a fast path that intentionally omits pivoting and replaces it with a pivot check (Section IV, Algorithms 3 and 4). The pivot check in Algorithm 1, lines 6-7, ensures that the chosen pivot is not small relative to the current row, but it does not by itself bound the error of the final solution; a pivoting-free factorization can pass such a check and still lose accuracy. The claim in Section IV that fast factorization has "numerical stability similar to that of factorization" is therefore not substantiated. The authors should report max residual norms for CKTSO, NICSLU, and PARDISO on all 56 benchmarks, at least for the no-re-pivoting best case and the 10% re-pivoting general case, and should also report accuracy-related quantities for the SPICE runs in Tables I and II.
- [Section VI-A2, Fig. 14] The general-case re-pivoting experiment is not representative of circuit workloads. Re-pivoting is injected by randomly selecting 3%, 5%, or 10% of the 100 runs and then choosing the restart row uniformly from [1, N]. In an actual factorization, the restart row is determined by a pivot violation at a particular position of the reordered matrix, and the cost of the pipelined tail factorization depends strongly on that position: an early restart can require nearly a full ETree-scheduled factorization with pivoting, while a late restart is cheap. Tables I and II report only the number of re-pivoting iterations (3 to 26) and not the restart rows or the share of factorization time spent in the tail factorization. The observation in Fig. 14 that speedups drop by only about 20% is therefore not directly transferable to real workloads. This is load-bearing because the headline 5.9x factorization speedup in Fig. 13 is a no-re-pivoting best case, and the amortized speedup in practice depends on re-pivot frequency and position.
- [Abstract and Section VII] The performance claims in the abstract and conclusions are stated without the qualification that most benchmark speedups are best-case no-re-pivoting measurements. The paper itself notes in Section VI-A2 that "most benchmark tests correspond to the best case of CKTSO's fast factorization, that is, no re-pivoting happens," but this caveat does not appear in the abstract or the conclusions. The SPICE results in Tables I and II are valuable real-workload evidence, but they cover only five nonlinear operating-point circuits and six linear power-grid transient circuits, and they do not decompose the runtime into fast-factorization savings and tail-factorization penalties. Before the "wide range of circuit matrices" claim can stand as stated, the paper should either calibrate the re-pivoting model on actual NR iterations for a larger and more diverse set of circuits, or explicitly scope the performance claim to the regime in which re-pivoting is rare.
minor comments (6)
- [Fig. 15 caption] The caption of Fig. 15 says that the legend "solver-T" means the factorization time, but the figure compares triangular solving time; this should be corrected.
- [Section I, Contributions] In the contribution list, "stat-of-the-art solvers" should be "state-of-the-art solvers".
- [Section VI-A2] The sentence "CKTSO is the fastest for 50 out of the 56 benchmarks" should specify whether the count applies to the 16-thread CKTSO run or to both the 1-thread and 16-thread configurations, since the surrounding text mixes both comparisons.
- [Section VI-A3] Similarly, the statement that CKTSO is the fastest for 49 out of 56 benchmarks in triangular solving should state the thread configuration used for CKTSO in that count.
- [Section V-C] The sentence "the setup time is about 2× of a solving time" is awkward; consider writing "about twice a single solving time".
- [Section VI-A2] No variance or run-to-run spread is reported for the 100 repeated factorizations used in the general-case re-pivoting experiment; a standard deviation or min-max range would help the reader assess the stability of the reported averages.
Circularity Check
No circular derivation found: CKTSO's claims rest on external benchmarks and fully disclosed algorithms, not on self-referential definitions.
full rationale
The paper's central claims are empirical performance comparisons against external solvers (NICSLU and PARDISO) on 56 SuiteSparse circuit matrices and in in-house SPICE simulations, so the headline speedups are not derived from the paper's own definitions or fitted values. The fast factorization algorithm is inherited from the author's prior ICCAD paper [15], but the paper explicitly discloses this inheritance, re-presents the algorithm in full pseudo-code (Algorithms 3-5), and evaluates it independently against NICSLU, PARDISO, and CKTSO's own re-factorization, so the self-citation is not the load-bearing support for the empirical claims. The triangular solving thresholds (70% nonzeros, 300,000 nonzeros, m=8, alpha=2.0) are empirical tuning constants, not fitted parameters that are then renamed as predictions, and they do not make any measured quantity equivalent to an input by construction. The 'guessed EGraph' is an explicitly stated assumption about smooth changes in circuit-simulation matrix values, which is a modeling premise rather than a circular derivation. The general-case re-pivoting experiments use randomly selected restart rows, which may limit how well they represent real circuit workloads, but this is a validity and evaluation limitation, not a circularity. No load-bearing step reduces to its own inputs by definition or by self-citation.
Assumptions & free parameters
free parameters (4)
- alpha_dividing_level =
2.0
- m_trapezoid_slices =
8
- dense_block_nnz_fraction =
0.70
- dense_block_min_nnz =
300000
assumptions (4)
- domain assumption Circuit matrix values change smoothly across successive Newton-Raphson iterations near convergence, so the guessed EGraph is usually valid.
- domain assumption LU factors of circuit matrices have a dense right-bottom corner and a sparse upper-left region.
- standard math The ETree is an upper bound on inter-row dependencies for any pivoting order of the up-looking factorization.
- domain assumption The 56 SuiteSparse circuit matrices are representative of general circuit simulation workloads.
Cite this review
Pith. "Pith review of CKTSO: High-Performance Parallel Sparse Linear Solver for General Circuit Simulations." pith.science (2026). https://pith.science/paper/4TXIGGUZ
@misc{pith2026241114082,
author = {Pith},
title = {Pith review of: CKTSO: High-Performance Parallel Sparse Linear Solver for General Circuit Simulations},
year = {2026},
howpublished = {\url{https://pith.science/paper/4TXIGGUZ}},
note = {Machine review of arXiv:2411.14082}
}
read the original abstract
This paper introduces CKTSO (abbreviation of "circuit solver"), a novel sparse linear solver specially designed for the simulation program with integrated circuit emphasis (SPICE). CKTSO is a parallel solver and can be run on a multi-core, shared-memory computer. The algorithms of CKTSO are designed by considering the features of matrices involved in SPICE simulations. CKTSO is superior to existing similar solvers mainly in the following three aspects. First, the matrix ordering step of CKTSO combines different types of ordering algorithms such that it can generally obtain the fewest fill-ins for a wide range of circuit matrices. Second, CKTSO provides a parallel fast LU factorization algorithm with pivot check, which behaves good performance, scalability, and numerical stability. Third, CKTSO provides a structure-adaptive hybrid parallel triangular solving algorithm, which can adapt to various circuit matrices. Experiments including both benchmark tests and SPICE simulations demonstrate the superior performance of CKTSO. The libraries of CKTSO are available at https://github.com/chenxm1986/cktso.
Figures
Figures from the paper (14 more)
Reference graph
Works this paper leans on
-
[1]
SPICE (Simulation Program with Inte- grated Circuit Emphasis),
L. W. Nagel and D. Pederson, “SPICE (Simulation Program with Inte- grated Circuit Emphasis),” EECS Department, University of California, Berkeley, Tech. Rep. UCB/ERL M382, Apr 1973. [Online]. Available: http://www2.eecs.berkeley.edu/Pubs/TechRpts/1973/22871.html
work page 1973
-
[2]
Accelerating Analog Simulation with HSPICE Precision Parallel Technology,
R. Daniels, H. V . Sosen, and H. Elhak, “Accelerating Analog Simulation with HSPICE Precision Parallel Technology,” Synopsys Corporation, Tech. Rep., 2010
work page 2010
-
[3]
A survey of direct methods for sparse linear systems,
T. A. Davis, S. Rajamanickam, and W. M. Sid-Lakhdar, “A survey of direct methods for sparse linear systems,” Acta Numerica , vol. 25, pp. 383–566, 2016
work page 2016
-
[4]
Algorithm 907: KLU, A Direct Sparse Solver for Circuit Simulation Problems,
T. A. Davis and E. P. Natarajan, “Algorithm 907: KLU, A Direct Sparse Solver for Circuit Simulation Problems,” ACM Trans. Math. Softw. , vol. 37, no. 3, pp. 36:1–36:17, Sep. 2010
work page 2010
-
[5]
Sparse partial pivoting in time proportional to arithmetic operations,
J. R. Gilbert and T. Peierls, “Sparse partial pivoting in time proportional to arithmetic operations,” SIAM J. Sci. Statist. Comput. , vol. 9, no. 5, pp. 862–874, 1988
work page 1988
-
[6]
NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation,
X. Chen, Y . Wang, and H. Yang, “NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation,” IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems , vol. 32, no. 2, pp. 261–274, 2013
work page 2013
-
[7]
An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation,
X. Chen, W. Wu, Y . Wang, H. Yu, and H. Yang, “An EScheduler-Based Data Dependence Analysis and Task Scheduling for Parallel Circuit Simulation,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 58, no. 10, pp. 702–706, 2011
work page 2011
-
[8]
Basker: A Threaded Sparse LU Factorization Utilizing Hierarchical Parallelism and Data Layouts,
J. D. Booth, S. Rajamanickam, and H. Thornquist, “Basker: A Threaded Sparse LU Factorization Utilizing Hierarchical Parallelism and Data Layouts,” in 2016 IEEE International Parallel and Distributed Process- ing Symposium Workshops (IPDPSW) , 2016, pp. 673–682
work page 2016
Show all 35 references
-
[9]
Solving unsymmetric sparse systems of linear equations with PARDISO,
O. Schenk and K. G ¨artner, “Solving unsymmetric sparse systems of linear equations with PARDISO,” Future Generation Computer Systems, vol. 20, no. 3, pp. 475–487, 2004
2004
-
[10]
PARDISO: A High-Performance Serial and Parallel Sparse Linear Solver in Semicon- ductor Device Simulation,
O. Schenk, K. G ¨artner, W. Fichtner, and A. Stricker, “PARDISO: A High-Performance Serial and Parallel Sparse Linear Solver in Semicon- ductor Device Simulation,” Future Gener. Comput. Syst., vol. 18, no. 1, pp. 69–78, Sep. 2001
2001
-
[11]
Algorithm 837: AMD, an approximate minimum degree ordering algorithm,
P. R. Amestoy, T. A. Davis, and I. S. Duff, “Algorithm 837: AMD, an approximate minimum degree ordering algorithm,” ACM Trans. Math. Softw., vol. 30, no. 3, p. 381–388, sep 2004
2004
-
[12]
Local fill reduction techniques for sparse symmetric linear systems,
G. Reißig, “Local fill reduction techniques for sparse symmetric linear systems,” Electrical Engineering, vol. 89, no. 8, pp. 639–652, 2007
2007
-
[13]
Modification of the minimum-degree algorithm by multiple elimination,
J. W. H. Liu, “Modification of the minimum-degree algorithm by multiple elimination,” ACM Trans. Math. Softw. , vol. 11, no. 2, p. 141–153, jun 1985
1985
-
[14]
M. S. Khaira, G. L. Miller, and T. J. Sheffler, Nested Dissection: A survey and comparison of various nested dissection algorithms . Carnegie- Mellon University. Department of Computer Science, 1992
1992
-
[15]
Numerically-Stable and Highly-Scalable Parallel LU Fac- torization for Circuit Simulation,
X. Chen, “Numerically-Stable and Highly-Scalable Parallel LU Fac- torization for Circuit Simulation,” in 2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD) , 2022, pp. 1–9
2022
-
[16]
The role of elimination trees in sparse factorization,
J. W. H. Liu, “The role of elimination trees in sparse factorization,” SIAM J. Matrix Anal. Appl. , vol. 11, no. 1, pp. 134–172, 1990
1990
-
[17]
SuiteSparse Matrix Collection
T. A. Davis, “SuiteSparse Matrix Collection.” [Online]. Available: https://sparse.tamu.edu/
-
[18]
X. Chen, Y . Wang, and H. Yang, Parallel sparse direct solver for integrated circuit simulation. Springer, 2017
2017
-
[19]
An overview of SuperLU: Algorithms, implementation, and user interface,
X. S. Li, “An overview of SuperLU: Algorithms, implementation, and user interface,” ACM Trans. Math. Softw. , vol. 31, no. 3, p. 302–325, sep 2005
2005
-
[20]
Algorithm 832: UMFPACK V4.3—an unsymmetric-pattern multifrontal method,
T. A. Davis, “Algorithm 832: UMFPACK V4.3—an unsymmetric-pattern multifrontal method,” ACM Trans. Math. Softw., vol. 30, no. 2, pp. 196– 199, Jun. 2004
2004
-
[21]
Sub-second state estimation implementation and its evaluation with real data,
Y . Chen, M. Rice, K. Glaesemann, and Z. Huang, “Sub-second state estimation implementation and its evaluation with real data,” in 2015 IEEE Power Energy Society General Meeting , 2015, pp. 1–5
2015
-
[22]
A comparative analysis of lu decomposition methods for power system simulations,
L. Razik, L. Schumacher, A. Monti, A. Guironnet, and G. Bureau, “A comparative analysis of lu decomposition methods for power system simulations,” in 2019 IEEE Milan PowerTech, 2019, pp. 1–6
2019
-
[23]
Integrated State Estimation and Contingency Analysis Software Implementation us- ing High Performance Computing Techniques,
Y . Chen, K. Glaesemann, M. Rice, and Z. Huang, “Integrated State Estimation and Contingency Analysis Software Implementation us- ing High Performance Computing Techniques,” IFAC-PapersOnLine, vol. 48, no. 30, pp. 227–232, 2015
2015
-
[24]
State- of-the-art sparse direct solvers,
M. Bollh ¨ofer, O. Schenk, R. Janalik, S. Hamm, and K. Gullapalli, “State- of-the-art sparse direct solvers,” Parallel algorithms in computational science and engineering , pp. 3–33, 2020
2020
-
[25]
Sparsifying Syn- chronization for High-Performance Shared-Memory Sparse Triangular Solver,
J. Park, M. Smelyanskiy, N. Sundaram, and P. Dubey, “Sparsifying Syn- chronization for High-Performance Shared-Memory Sparse Triangular Solver,” in Supercomputing, 2014, pp. 124–140
2014
-
[26]
A. M. Bradley, A Hybrid Multithreaded Direct Sparse Triangular Solver, pp. 13–22
-
[27]
Parallel forward and back substitution for efficient power grid simulation,
X. Xiong and J. Wang, “Parallel forward and back substitution for efficient power grid simulation,” in 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) , 2012, pp. 660–663
2012
-
[28]
On Algorithms For Permuting Large Entries to the Diagonal of a Sparse Matrix,
I. S. Duff and J. Koster, “On Algorithms For Permuting Large Entries to the Diagonal of a Sparse Matrix,” SIAM Journal on Matrix Analysis and Applications, vol. 22, no. 4, pp. 973–996, 2001
2001
-
[29]
The design and use of algorithms for permuting large entries to the diagonal of sparse matrices,
——, “The design and use of algorithms for permuting large entries to the diagonal of sparse matrices,” SIAM Journal on Matrix Analysis and Applications, vol. 20, no. 4, pp. 889–901, 1999
1999
-
[30]
Computing the Minimum Fill-In is NP-Complete,
M. Yannakakis, “Computing the Minimum Fill-In is NP-Complete,” SIAM J. Algebraic Discrete Methods , vol. 2, no. 1, p. 77–79, mar 1981
1981
-
[31]
A fast and high quality multilevel scheme for partitioning irregular graphs,
G. Karypis and V . Kumar, “A fast and high quality multilevel scheme for partitioning irregular graphs,” SIAM Journal on scientific Computing, vol. 20, no. 1, pp. 359–392, 1998
1998
-
[32]
The Minimum Degree Ordering with Constraints,
J. W. H. Liu, “The Minimum Degree Ordering with Constraints,” SIAM Journal on Scientific and Statistical Computing, vol. 10, no. 6, pp. 1136– 1145, 1989
1989
-
[33]
Validity of the single processor approach to achieving large scale computing capabilities,
G. M. Amdahl, “Validity of the single processor approach to achieving large scale computing capabilities,” in Proceedings of the April 18-20, 1967, Spring Joint Computer Conference , 1967, p. 483–485
1967
-
[34]
A Numerical Evaluation of Sparse Direct Solvers for the Solution of Large Sparse Symmetric Linear Systems of Equations,
N. I. M. Gould, J. A. Scott, and Y . Hu, “A Numerical Evaluation of Sparse Direct Solvers for the Solution of Large Sparse Symmetric Linear Systems of Equations,” ACM Trans. Math. Softw., vol. 33, no. 2, pp. 10– es, jun 2007
2007
-
[35]
IBM Power Grid Benchmarks
“IBM Power Grid Benchmarks.” [Online]. Available: https://web.ece. ucsb.edu/∼lip/PGBenchmarks/ibmpgbench.html Xiaoming Chen (S’12-M’15) received the BS and PhD degrees in electronic engineering from Ts- inghua University, Beijing, China, in 2009 and 2014, respectively. He is a...
2009
Reviewed August 12, 2026 · model on record in the stance chip above.
Discussion (0). Continue with ORCID to comment.