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REVIEW 3 major objections 6 minor 76 references

NeoHebbian Synapses to Accelerate Online Training of Neuromorphic Hardware

T0 review · 3 major / 6 minor · reviewed 2026-08-12 · deepseek-v4-flash

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Pith's one-line read A ReRAM synapse stores its eligibility trace as local heat, enabling online e-prop training without backpropagation through time.

desk verdict Novel thermal eligibility-trace concept undermined by an internal inconsistency: the paper's own numbers predict no trace accumulation, so the central claim is not established. read the letter →

arxiv 2411.18272 v1 pith:OUK4WN5N submitted 2024-11-27 cs.ET cs.NE

Shubham Pande , Sai Sukruth Bezugam , Tinish Bhattacharya , Ewelina Wlazlak , Anjan Chakaravorty , Bhaswar Chakrabarti , Dmitri Strukov This is my paper · ORCID
classification cs.ETcs.NE
keywords NeoHebbiansynapseeligibilitytracee-propReRAMthree-factorlearningrulespikingneuralnetworkthermalcouplingonline
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper proposes a synaptic device that can run the e-prop learning rule for recurrent spiking neural networks directly in hardware, without backpropagation through time. The central idea is a thermal neoHebbian synapse: a ReRAM cell whose conductance is the coupling weight, while its local temperature is the eligibility trace. A resistive heater receives signals from the pre- and post-synaptic neurons, and the resulting Joule heating makes the ReRAM temperature rise in proportion to their product; at the end of a data frame, a fixed programming pulse changes the conductance by an amount proportional to the accumulated temperature rise. The authors experimentally characterize the temperature-dependent switching of fabricated ReRAM devices and use hardware-aware simulations on a maze-navigation reinforcement task and the TIMIT phoneme classification task to argue that such synapses are fast, compact, and energy-efficient. If correct, this would give neuromorphic chips a physically local, low-energy way to implement three-factor learning rules and train recurrent spiking networks online.

What carries the argument

The central object is the thermal neoHebbian synapse: a 1T-1H-1M unit cell in which a resistive heater is 3D-integrated with a ReRAM cell, sharing an electrode so that heat flows directly into the switching oxide. The eligibility trace $e(t)$ is computed physically as Joule heating proportional to $f(t) \times \psi(t)$, accumulated as the local temperature rise $e_\Sigma$ over the dataframe, and read out during the weight-update phase as a temperature-enhanced conductance change under a fixed programming pulse. The argument runs on Eq. (8), $\Delta w = \eta e_\Sigma$, together with the first-order thermal model Eq. (23), which sets the required relationship between pulse width, thermal time constant, and accumulated temperature.

What would settle it

Measure the actual ReRAM temperature in a fabricated 1T-1H-1M cell while applying e-update pulses spaced 1 ms apart with a thermal time constant near 1 microsecond; if the temperature returns to ambient before each next pulse, the accumulated eligibility $e_\Sigma$ is erased and the weight update is no longer proportional to the summed trace.

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Extended reading notes

Core claim

The paper's central claim is that the local temperature of a ReRAM device can serve as the eligibility trace in the e-prop three-factor learning rule, making each synapse a self-contained online-learning element. In the proposed 1T-1H-1M cell (one transistor, one heater, one ReRAM), the transistor and heater encode the product $f(t) \times \psi(t)$ as dissipated power; the resulting temperature rise of the ReRAM accumulates over a dataframe, and a fixed-amplitude programming pulse at the end of the frame turns that accumulated temperature into a conductance change $\Delta w = \eta e_\Sigma$. The authors report experimental data from standalone ReRAM devices showing that normalized conductance change under fixed SET/RESET pulses grows with ambient temperature, and they fit this data into system-level simulations. In those simulations the synapse matches ideal software synapses on TIMIT phoneme classification when given roughly 8-bit precision, loses only about 3% accuracy under scaled thermal crosstalk, and its natural temperature decay implements the discount factor in a reinforcement-learning maze task.

Load-bearing premise

The argument depends on the ReRAM's local temperature building up over a whole dataframe and staying there until the weight update, yet the paper's own thermal model has that temperature relaxing in about a microsecond between one-millisecond simulation steps.

Editorial extensions

If this is right

  • Online training of recurrent spiking networks with e-prop becomes implementable in crossbar arrays without unfolding the network or propagating errors backward in time.
  • Both state variables live locally in the synapse, so no separate high-precision digital unit is needed for eligibility traces, shrinking per-synapse area to 450F^2 with no added footprint for the heater.
  • Per-timestep learning energy is estimated around 5 pJ, orders of magnitude below prior PCM- or CMOS-based eligibility implementations.
  • Natural temperature decay is not only tolerable but useful: it provides the discount factor in reinforcement learning, letting the agent weight recent actions more heavily.
  • With roughly 8-bit ReRAM precision, degradation on TIMIT phoneme classification stays under 3%, and scaling to denser crossbars costs about 3% accuracy from thermal crosstalk.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Because temperature is a hidden variable, a practical chip would need either a calibration scheme or a secondary readout to know the accumulated eligibility before the weight update; the paper does not demonstrate that readout.
  • The proportionality between temperature and eligibility assumes the product $f(t) \times \psi(t)$ maps to heater power through transistor biasing; a fabricated 1T-1H-1M cell, rather than a standalone ReRAM at controlled ambient temperature, would be the direct test of that mapping.
  • The same thermal mechanism should generalize to any three-factor rule whose third factor can be encoded as a positive/negative signal pair, so other rules such as reward-modulated STDP could reuse the device unchanged.
  • Thermal crosstalk, treated here mainly as a source of error, could in principle be exploited as a built-in lateral coupling for neighborhood-based learning rules, though that would require deliberate engineering rather than suppression.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 6 minor

Summary. The paper proposes a 'thermal neoHebbian synapse' in which a ReRAM device stores the synaptic weight in its conductance and encodes the eligibility trace e(t) in the local temperature of the ReRAM. A resistive heater is 3D-integrated with the ReRAM; during the e-update phase, voltage signals representing the pre-synaptic activity f(t) and post-synaptic pseudo-gradient ψ(t) are applied across the heater, producing Joule heating and a local temperature rise proportional to f(t)×ψ(t). The temperature is claimed to accumulate over the presentation of a U-step dataframe, and at the end of the frame a fixed-amplitude programming pulse produces a conductance change proportional to the accumulated temperature, implementing Δw = η·eΣ. The paper presents measurements of temperature-dependent ReRAM switching (Sec. 3.1), COMSOL electrothermal simulations of the coupled heater–ReRAM structure (Sec. 4), and system-level simulations of e-prop training on TIMIT phoneme classification and of reinforcement learning in a maze (Sec. 5). The authors report that the proposed synapse trains close to ideal software synapses despite thermal decay, crosstalk, and device variability.

Significance. If the thermal accumulation mechanism worked as described, the proposed synapse would be an elegant and compact way to implement online three-factor learning (e-prop) in neuromorphic hardware, with a small per-synapse footprint and low write energy. The experimental data on temperature-dependent SET/RESET switching of ReRAM (Fig. 3) and the COMSOL thermal-coupling analysis (Fig. 6) are useful contributions in their own right. However, the central claim of the paper—that the ReRAM local temperature can accumulate the eligibility trace over the dataframe and retain it until the weight update—is undermined by the paper's own model equations and parameter choices, and the integrated device was not fabricated. The creativity of the concept and the quality of the temperature-dependent switching measurements do not compensate for the lack of a demonstration that the core mechanism actually works as claimed.

major comments (3)
  1. [Sec. 5.2, Appendix 7.2, 7.3, Eq. (23)] The central accumulation premise is inconsistent with the paper's own thermal model. Equation (23) is a first-order relaxation with time constant τTH; with the stated simulation step δt = 1 ms (Appendix 7.2) and the claimed sufficient τTH ≈ 1 µs (Sec. 5.2, Fig. 11d), the ratio tPW/τTH is either 1000 (if tPW ≈ δt) or, if tPW < τTH as recommended in Sec. 4, the temperature decays to ambient between successive e-updates because δt/τTH = 1000. In either reading, the accumulated temperature rise eΣ is lost, and the weight-update pulse would see only the last step's eligibility. The authors' statement that 'test accuracy increases with an increase in τTH and saturates for τTH values exceeding 1 µs' (Sec. 5.2) is therefore in direct conflict with Eq. (23). The explicit Euler form of Eq. (23) is numerically unstable for tPW/τTH > 1, so the model as written cannot support the reported saturation. The paper does not specify tPW or how the thermal decay between pulses is handled in the benchmark simulations, and no code or data are provided to resolve this ambiguity. This is a load-bearing inconsistency that invalidates the claim that the synapse can accumulate the eligibility trace over a dataframe.
  2. [Sec. 3.1, Sec. 6] The integrated heater+ReRAM synapse was not fabricated. The experiments in Sec. 3.1 measure only a standalone ReRAM at different ambient temperatures, which demonstrates that the switching magnitude ΔG/G0 depends on temperature but does not validate the proposed synapse's core functionality: local temperature encoding of e(t), thermal accumulation over the dataframe, and the proportionality of the weight update to the accumulated temperature. The abstract and Sec. 6 claim the synapse has been 'experimentally validated,' but the actual device that would realize the proposed mechanism exists only in COMSOL simulations and in network-level models. The absence of a fabricated integrated cell, or at minimum of an experimental surrogate that demonstrates accumulation over the relevant timescale, leaves the central mechanism unverified.
  3. [Sec. 5.2, Appendix 7.5] The network-level evaluation is largely circular with respect to the central claim. The hardware-aware simulations implement the eligibility accumulation through Eq. (23), which was constructed specifically to produce a temperature rise proportional to f(t)×ψ(t) and to accumulate over time, and the weight update uses Eq. (27) fitted to the measured ΔG(T) data. The finding that the network trains close to ideal (Fig. 11b) therefore partly reflects the model's design rather than an independently validated physical mechanism. The only independent anchors are the ΔG(T) measurements and the COMSOL thermal response of a single heating pulse (Fig. 6d); neither demonstrates that the eligibility trace can be retained for the duration of a dataframe (hundreds of milliseconds to seconds) with the proposed device parameters. The paper should provide either an experimental demonstration of the accumulation or a clearly separate justification of the thermal model's fidelity beyond its construction.
minor comments (6)
  1. [Sec. 5.2] The heading and text repeatedly use 'Phenome' instead of 'Phoneme'; this should be corrected throughout the section and the abstract.
  2. [Sec. 3.2] The word 'noeHebbian' appears in the second paragraph of Sec. 3.2; it should be 'neoHebbian.'
  3. [Sec. 2] The section heading 'Eligibiiility-based Learning' contains a typo; it should be 'Eligibility-based Learning.'
  4. [Abstract and Sec. 6] The abstract and Sec. 6 state the synapse has been 'experimentally validated,' but Sec. 3.1 only reports measurements on a standalone ReRAM at elevated ambient temperature. I recommend softening this wording to 'experimentally characterized' or explicitly stating that the integrated device is a proposal supported by simulations.
  5. [Sec. 5.1] The mapping between the discount factor γ used in the reinforcement-learning simulations and the thermal time constant τTH is not specified. The text states that temperature decay realizes γ, but the figures use γ as a free parameter without giving the conversion, which makes it difficult to assess whether the reported optimal γ values correspond to realistic device parameters.
  6. [Data Availability] The data availability statement says data are available upon reasonable request, but no code or data repository is provided. Given that the central simulation results cannot be reproduced without the code and fitted parameters, I recommend providing a public repository with the simulation scripts and fitting routines.

Circularity Check

0 steps flagged · score 1.0 of 10

No significant circularity: the thermal-synapse model and network simulations are self-contained, with independent experimental anchoring for the ΔG(T) device response.

full rationale

The paper's central derivation is not circular in the sense prohibited here. The eligibility-trace encoding is defined through explicit circuit and thermal equations (Eqs. 18–24): the heater power is made proportional to f(t)·ψ(t) by voltage scaling, and the first-order thermal update (Eq. 23) accumulates this product with leakage. The weight update uses the measured temperature-dependent conductance change, summarized in the fitted device model (Eq. 27) and overlaid on experimental data in Fig. 14. The network-level simulations then take this device model and the e-prop update rule (Eqs. 16–17) as inputs; the reported accuracy curves are emergent outputs of the training dynamics, not quantities defined to equal the inputs. No fitted parameter is renamed as a prediction: Eq. 27 is explicitly a fit to measured ΔG(G0, T), and the TIMIT/RL results are simulations using that model. The self-citations ([45], [50], [10]) are for fabrication methods, a temperature-coefficient model, and a design variant (extra transistor) and are not load-bearing for the core mechanism. The paper is explicit about its limitations: only standalone ReRAM was measured at elevated ambient temperature, and the integrated heater+ReRAM cell was not fabricated. There is also a potential internal inconsistency between the stated 1 ms simulation step and the claimed sufficient τTH ≈ 1 µs, which calls into question whether the simulated temperature trace truly accumulates over the dataframe; this is a correctness/validation gap rather than a circular reduction, because the simulation is not asserted to be identical to the experimental measurement by construction. Overall, the derivation chain contains real independent content: the experimental ΔG(T) data, the circuit-level multiplication, and the standard e-prop algorithm are all externally grounded.

Assumptions & free parameters 4 free parameters · 4 assumptions · 1 invented entities

The central claim rests on a small number of fitted device-model parameters, on the unmeasured assumption that heater-induced temperature integrates and persists over the training frame, and on an integrated device that was simulated but not built. The learning algorithm itself is standard and externally established.

free parameters (4)
  • SET fit parameters a,b,c,d = 0.143, 2.216, 0.8232, 0.4043
    Fitted to the measured ΔG/G0(G0,T) data for the SET process (Appendix 7.5, Eq. 27); used in all hardware-aware simulations of weight updates.
  • RESET fit parameters a,b,c,d = 0.3124, 0.8064, 1.138, -0.8806
    Fitted to the measured RESET data; same use as the SET parameters.
  • Temperature coefficient α of ReRAM conductance = swept; threshold ~4e-4 μS/K
    Models conductance change with local temperature W=W(1+α(T-Tamb)) in Figs. 9 and 14(d); a device property not measured in this paper.
  • COMSOL material parameters and geometry (κth, σ, ρ, C, F, K) = Table 2 values; F=60nm, K varied
    Chosen by hand for the electrothermal simulations to study scaling and crosstalk; representative values cited from prior works, not fitted to the central claim.
assumptions (4)
  • domain assumption ReRAM conductance change ΔG is proportional to the accumulated temperature rise (eligibility trace) at the time of the write pulse
    Central premise of the synapse; measured only as ΔG vs ambient T for a standalone ReRAM (Fig. 3), never as a function of accumulated heater-induced temperature dynamics.
  • domain assumption The transistor-heater circuit produces heater power PH ∝ f(t)×ψ(t) via the voltage scalings of Eq. (22) with the transistor in triode
    Assumes ideal transistor behavior and that neurons can supply the nonlinear voltage functions; no circuit-level measurement is provided.
  • domain assumption The thermal time constant τTH can be set to values appropriate for the target tasks (approx 1 μs or larger) and e-update pulses satisfy tPW < τTH
    Invoked in Sec. 4 and 5.2; the paper cites refs [52,53] for feasibility, but those works do not demonstrate accumulation over 100-700 ms frames.
  • standard math The e-prop algorithm (Bellec et al. [36]) provides a valid approximation to BPTT for the TIMIT task
    Used as the training framework without modification; standard established algorithm in the cited literature.
invented entities (1)
  • Thermal neoHebbian synapse (heater 3D-integrated with ReRAM)
    purpose: Encodes the eligibility trace in local ReRAM temperature and makes weight updates proportional to the accumulated temperature (eΣ)
    Only the standalone ReRAM temperature dependence was measured; the integrated heater-ReRAM cell and its thermal dynamics were simulated in COMSOL, not fabricated. No independent falsifiable measurement of the integrated device is provided.

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Cite this review

Pith. "Pith review of NeoHebbian Synapses to Accelerate Online Training of Neuromorphic Hardware." pith.science (2026). https://pith.science/paper/OUK4WN5N

@misc{pith2026241118272,
  author       = {Pith},
  title        = {Pith review of: NeoHebbian Synapses to Accelerate Online Training of Neuromorphic Hardware},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/OUK4WN5N}},
  note         = {Machine review of arXiv:2411.18272}
}
read the original abstract

Neuromorphic systems that employ advanced synaptic learning rules, such as the three-factor learning rule, require synaptic devices of increased complexity. Herein, a novel neoHebbian artificial synapse utilizing ReRAM devices has been proposed and experimentally validated to meet this demand. This synapse features two distinct state variables: a neuron coupling weight and an "eligibility trace" that dictates synaptic weight updates. The coupling weight is encoded in the ReRAM conductance, while the "eligibility trace" is encoded in the local temperature of the ReRAM and is modulated by applying voltage pulses to a physically co-located resistive heating element. The utility of the proposed synapse has been investigated using two representative tasks: first, temporal signal classification using Recurrent Spiking Neural Networks (RSNNs) employing the e-prop algorithm, and second, Reinforcement Learning (RL) for path planning tasks in feedforward networks using a modified version of the same learning rule. System-level simulations, accounting for various device and system-level non-idealities, confirm that these synapses offer a robust solution for the fast, compact, and energy-efficient implementation of advanced learning rules in neuromorphic hardware.

Figures

Figures reproduced from arXiv: 2411.18272 by the authors.

Figure 1
Figure 1. (a) Schematic of a spiking neural network incorporating neoHebbian synapses. (b) The evolution of signals [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. High-level description of the thermal neoHebbian synapse operation: (a) Three key stages involved in the training [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. (a) Representative I-V curves measured with quasi-static DC voltage sweep at 1V/s on 250 [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (11 more)
Figure 4
Figure 4. Figure 4: 1T-1H-1M unit cell implementation of the thermal neoHebbian synapse. During the dataframe presentation, the operation of the synapse is time multiplexed between (a) Spike integration - ϕE = 0 and (b) e-update - ϕE = 1 phase (c) Weight update is performed at the end of …
Figure 5
Figure 5. Figure 5: (a) Differential mode crossbar-array implementation of the 1 [PITH_FULL_IMAGE:figures/full_fig_p008_5.png]
Figure 6
Figure 6. Figure 6: (a) 1T-1H-1M synapse unit cell. (b) Modeled geometry for electrothermal analysis. (c) Temperature contours [PITH_FULL_IMAGE:figures/full_fig_p009_6.png]
Figure 7
Figure 7. Figure 7: (a) Schematic of SNN used for illustrating reinforcement learning using neoHebbian synapse. Here, the agent, [PITH_FULL_IMAGE:figures/full_fig_p011_7.png]
Figure 8
Figure 8. Figure 8: Heatmap compares the average number of episodes required to reach the learning benchmark across different grid [PITH_FULL_IMAGE:figures/full_fig_p011_8.png]
Figure 9
Figure 9. Figure 9: The heatmaps illustrate success ratios for a spiking neural network agent’s training across various grid sizes with [PITH_FULL_IMAGE:figures/full_fig_p012_9.png]
Figure 10
Figure 10. Figure 10: The schematic of the fully connected RSNN with one hidden layer. The input and hidden layers consist of spiking [PITH_FULL_IMAGE:figures/full_fig_p013_10.png]
Figure 11
Figure 11. Figure 11: (a) A sample from the TIMIT data set applied to the input layer of the modeled RSNN used for the TIMIT [PITH_FULL_IMAGE:figures/full_fig_p014_11.png]
Figure 12
Figure 12. Figure 12: Schematic of the 1T-1H-1M unit cell showing biasing conditions during the e-update phase. 21 [PITH_FULL_IMAGE:figures/full_fig_p021_12.png]
Figure 13
Figure 13. Figure 13: (a) Cross-sectional schematic of the modeled heater-integrated ReRAM structure. (b) The modeled geometry is [PITH_FULL_IMAGE:figures/full_fig_p023_13.png]
Figure 14
Figure 14. Figure 14: Experimental data overlaid with modeled ∆ [PITH_FULL_IMAGE:figures/full_fig_p024_14.png]

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