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Hybrid Cooperative Co-Evolution Algorithm for Deadlock-prone Distributed Assembly Flowshop Scheduling with Limited buffers Using Petri nets

T0 review · 3 major / 6 minor · reviewed 2026-08-10 · deepseek-v4-flash

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Pith's one-line read A Petri net repair that amends job order in quadratic time makes limited-buffer assembly schedules deadlock-free, and embedding it in a cooperative co-evolution search lowers makespan below three prior algorithms on all tested instances.

desk verdict A credible deadlock-avoidance idea for a real scheduling problem, but the makespan calculation can return infeasible schedules, so the experimental results are not yet trustworthy. read the letter →

arxiv 2501.14765 v1 pith:4GB3MK52 submitted 2024-12-28 cs.DC cs.SYeess.SY

Siyi Wang , Yanxiang Feng , Xiaoling Li , Guanghui Zhang , Yikang Yang This is my paper · ORCID
classification cs.DCcs.SYeess.SY MSC 90B3568Q85
keywords distributedassemblyflowshopschedulingdeadlock-freePetrinetsBanker'salgorithmcooperativeco-evolutionlimitedbuffermakespanminimizationdeadlock
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Limited-buffer assembly lines can stall completely when the buffer fills with jobs that cannot yet be assembled because their product's remaining jobs have not arrived. This paper claims that such deadlocks are caused by the order in which finished jobs enter the assembly buffer, and that a repair procedure built on a Petri net model and a Banker's-algorithm-style safety check can always convert any job order into a deadlock-free one in O($u^{2}$) time. Embedding this repair inside a hybrid cooperative co-evolution algorithm, the paper reports lower makespan than three existing algorithms on all 324 tested instances. A sympathetic reader should take away that deadlock can be treated as a scheduling constraint at the job-order level rather than as a separate control problem.

What carries the argument

The key object is the assembly-procedure Petri net (APP), which models each job's move into the limited buffer as a transition firing and each product's assembly as another transition that returns buffer tokens. On top of it, an improved Banker's algorithm (IBA) tests whether a marking is safe, meaning some sequence of product-assembly firings can still finish all products; IDAM then walks along a candidate job permutation, firing entries one by one and moving any transition that would create an unsafe marking to the back of the order. This converts an arbitrary job permutation into a deadlock-free one. The HCCE algorithm carries two subpopulations, one of job permutations and one of factory permutations, and uses the repair inside initialization, global evolution, information transfer, and local search.

What would settle it

Forward-simulate any HCCE solution on the paper's smallest instance type using the processing times generated by the benchmark; if the backward makespan equations ever yield a negative start time, or the simulated buffer ever fills with jobs whose product is not completable, then the claimed IDAM guarantee plus backward calculation does not describe a realizable deadlock-free schedule.

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Extended reading notes

Core claim

The central claim is that, for a distributed assembly flowshop with a limited assembly buffer, deadlock-freeness of a schedule is equivalent to deadlock-freeness of the order in which jobs enter the buffer, and that this order can be checked and amended using an assembly-procedure Petri net together with an improved Banker's algorithm. The paper's IDAM procedure reads a candidate job permutation, fires the corresponding buffer-entry transitions, and whenever a transition would lead to a marking from which no product can ever be completed, moves that transition to the end of the sequence. The resulting permutation is deadlock-free by construction, and the whole repair costs O($u^{2}$). The paper then folds this repair into a two-subpopulation cooperative co-evolution algorithm with an elite archive, and computes the system makespan with backward equations that maintain the repaired order's feasibility. On 324 generated instances, HCCE reports lower best and average relative percentage deviations than HHMA, EDMBO, and PBIGA for small, medium, and large instance groups.

Load-bearing premise

The deadlock-free guarantee is shown in a model where all jobs are available at time zero, and that model does not account for the timed order in which jobs actually finish in the factories.

Editorial extensions

If this is right

  • Any schedule produced through IDAM is deadlock-free by construction, so limited-buffer DAFSP solutions can be certified without building a separate deadlock controller.
  • Because the repair costs O(u^2), it can be run inside every fitness evaluation of a metaheuristic without changing the algorithm's asymptotic character.
  • The two-permutation coding separates the job-order problem from the factory-assignment problem, allowing cooperative co-evolution to search both spaces with problem-specific operators.
  • On the paper's 324 instances, HCCE reports lower best and average RPD than HHMA, EDMBO, and PBIGA in every group, which implies the repair is not only feasible but helpful for makespan.
  • The assembly order extracted from the repaired job sequence gives a direct way to schedule the assembly machine, so the same machinery handles both deadlock control and makespan computation.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the central claim holds, the same buffer-order repair could be tried on other two-stage systems where a batch needs several parts and a limited buffer, such as final assembly in electronics or food processing; the paper itself does not test those settings.
  • The paper leaves implicit that the safety certificate is checked on a zero-ready-time abstraction; a natural extension is to verify with a discrete-event simulator that an IDAM-safe order never blocks under realistic arrival times.
  • An extension not explored in the paper is dynamic repair: instead of repairing the whole permutation once, IDAM could be reapplied when new jobs or urgent product insertions arrive, using the remaining buffer state as the initial marking.
  • The backward makespan equations could be tested against forward simulation as an independent audit; this would show whether the repaired order also minimizes or merely respects the assembly constraints.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 6 minor

Summary. The paper proposes a hybrid cooperative co-evolution (HCCE) algorithm for the distributed assembly flowshop scheduling problem (DAFSP) with limited assembly buffers, aiming to minimize makespan while avoiding deadlocks. The authors model the buffer-entry process with an assembly procedure Petri net (APP), propose an improved Banker's algorithm (IBA) to check the safety of a marking, and develop IDAM, a polynomial-time method that amends an arbitrary job permutation into a deadlock-free one. They then integrate IDAM into a cooperative co-evolution framework with an elite archive, problem-specific heuristics, information transfer, and four local-search operators. Computational experiments on 324 generated instances report that HCCE outperforms three state-of-the-art algorithms (HHMA, EDMBO, PBIGA) and three self-designed variants, with Friedman test p-values of 0. The paper claims, in the abstract and contributions, that IDAM guarantees feasible (deadlock-free) solutions and that the backward makespan calculation maintains this property.

Significance. If the central claims were correct, the paper would make a useful contribution to scheduling under limited buffers, a real concern in semiconductor and food processing systems. The idea of translating deadlock avoidance into a Petri-net/Banker's-algorithm check and embedding it into a population-based metaheuristic is interesting and, to the best of my knowledge, not previously applied to DAFSP. The algorithmic machinery is described in enough detail to be reimplemented, and the comparison against multiple baselines is welcome. However, the significance hinges on whether the deadlock-freeness guarantee actually transfers to the timed scheduling problem and whether the reported makespans correspond to realizable schedules. The paper does not supply a formal proof of that transfer, and a concrete counterexample shows that the backward makespan calculation can output infeasible schedules. Because all experimental results are computed with that makespan, the empirical claims are not trustworthy as presented.

major comments (3)
  1. [Section III.D, Eqs. (2)-(9)] The backward makespan calculation does not guarantee feasibility of the resulting schedule. Consider f=2, m=1, u=4, AP1={i1,i2}, AP2={i3,i4}, buffer capacity Psi=4, lambda'=(i1,i2,i3,i4), mu=(F1,F2,F1,F2). This lambda' is IDAM-safe because the buffer can hold all jobs simultaneously. Equation (3) assigns completion times C_i1=Time-3, C_i2=Time-2, C_i3=Time-1, C_i4=Time on the single machine. On F1, feasibility requires S_i3 >= C_i1, i.e., Time-1-p_i3 >= Time-3, or p_i3 <= 2. Similarly on F2, p_i4 <= 2. For p_i3=p_i4=5, no feasible single-machine schedule exists with these completion times, yet Eqs. (7)-(9) output a makespan. Thus the claim in contribution 2 that the backward method 'maintains the deadlock-freeness of solution' is unsupported; deadlock-freeness of the buffer order does not imply machine-capacity feasibility of the timed schedule. Since Section V uses this makespan as the performance metric, the reported superiority of HCCE may be based on invalid objective values.
  2. [Section III.C.1, Definition 1 (Step 3) and Remark 1] The APP model initializes M0(pi)=1 for every job i, i.e., all jobs are assumed to be simultaneously finished and ready to enter the assembly buffer at time zero. IDAM only certifies that a deadlock-free buffer-entry order exists under this untimed, all-jobs-ready abstraction. The paper does not prove that a sequence safe under this abstraction remains safe in the actual timed DAFSP, where jobs complete at different times and, under assumption (5), a finished job is removed into BA only if space is available; otherwise it must block the last machine of its factory. A blocking last machine can propagate and create a deadlock even when the buffer-entry order is the one produced by IDAM. No argument is given that the backward schedule of Section III.D prevents such blocking, and the counterexample above shows that the backward equations can violate machine availability. Consequently, the abstract's claim that IDAM 'ensure[s] the feasibility (i.e., deadlock-freeness) of solutions' is not established for the real problem.
  3. [Section III.C.3, 'Computational complexity of Algorithm IDAM'] The paper states that IDAM has complexity O(u^2), but this ignores the cost of each IBA call in Algorithm 1. IBA itself contains a loop over unfinished products (lines 4-18), and each iteration scans products to build the set Psi, so a single IBA call costs at least O(l^2) in the worst case, where l is the number of products. The total complexity of IDAM is therefore O(u^2 * l^2) (or O(u^2 * l) with a careful implementation), not O(u^2) as claimed in the abstract and in Section III.C.3. Polynomial complexity remains, but the stated bound is inaccurate and should be corrected.
minor comments (6)
  1. [Section V.B, Table V vs. Section V.A] The parameter calibration is performed on instances from the same distribution as the test set (e.g., medium calibration uses u x f x m x l = 40 x 4 x 10 x 8, which also appears as a test size). The reported superiority of HCCE is therefore based on parameters tuned to the test distribution; the paper should explicitly discuss this potential source of overfitting to the benchmark.
  2. [Eq. (2) and Section V.A] The symbol 'Time' is used for two different purposes: as a variable in Eq. (2) denoting the completion time of the last job on the last machine, and as a multiplier in the termination criterion 'Time x u x f x m x l ms' in Section V.A. Please use distinct notation to avoid confusion.
  3. [Tables VII and IX] The Friedman test results report Chi-Square and P-value but do not state the number of algorithms k, the number of instance groups N, or the degrees of freedom. These details are needed for the reader to verify the statistical analysis. Also, 'Freidman' should be spelled 'Friedman'.
  4. [Section II and reference [10]] Reference [10] (Cao et al.) is mentioned in the Introduction for the claim that deadlock in DASP is related to the order of finished jobs entering the buffer, but it is not discussed in the Literature Review. If that reference already addresses deadlock control for a two-stage assembly flowshop with limited buffers, the assertion 'for the first time, we use Petri nets to analyze the deadlocks in DAFSP' should be qualified by explaining what is truly new relative to [10].
  5. [Section V, Tables VI and VIII] The paper reports only relative percentage deviations (RPD) and not the actual CAmax values for any instance. Reporting absolute makespans (or at least the best-known values per instance) would help readers assess the practical magnitude of the improvements.
  6. [Equations (3)-(5), (8)] Several equations are rendered with misplaced braces, fractions, and symbols (e.g., Eq. (3) shows a garbled 'if' condition, and Eq. (8) has ambiguous indentation). The equations should be typeset cleanly so that the algorithmic intent is unambiguous.

Circularity Check

1 steps flagged · score 3.0 of 10

Mild in-sample parameter calibration; IDAM deadlock derivation is not circular, but timed-feasibility of the backward makespan equations is an unproven correctness gap.

  1. fitted input called prediction [Section V.B (Parameter calibration) and Section V.D (Comparison with state-of-the-art algorithms)]
    "DOE is performed three times for instances with u x f x m x l = 16 x 3 x 4 x 4, 40 x 4 x 10 x 8, and 80 x 8 x 18 x 10, respectively. ... the recommended parameter sets {PS, ep, alpha, cd} for small-scale, medium-scale, and large-scale instances are {50, 0.2, 21, 0.1}, {35, 0.5, 21, 0.1}, and {25, 0.2, 3, 0.7}, respectively. ... The HCCE algorithm outperforms other compared algorithms for all instance types."

    The four parameters (PS, ep, alpha, cd) are selected by minimizing average system makespan on one representative instance of each instance type (16x3x4x4 for small, 40x4x10x8 for medium, 80x8x18x10 for large). The same three instance types, including those exact representative combinations, are then used as the benchmark for the claim that HCCE outperforms HHMA, EDMBO, and PBIGA for all instance types. The superiority claim is therefore partly in-sample: the hyperparameters were chosen to make HCCE best on the very distribution, and on one member of each test group, used to evaluate it. This does not force the outcome by construction, but it makes the reported superiority statistically biased and is the paper's only genuinely circular-adjacent step.

full rationale

IDAM's internal logic is self-contained: IBA checks reachability of the APP final marking, and IDAM moves unsafe transitions to the end, so the amended job permutation is deadlock-free by construction within the APP model. That result is not a fit or a renamed known result, and the comparisons with HHMA, EDMBO, and PBIGA use external algorithms with a common RPD metric, so the performance claims are not defined into the algorithm. Reference [10] (Cao, Feng, Xing, Zhang) shares authors with this paper, but the premise that deadlock depends on the buffer-entry order is also supported by Example 1 and Definition 1, so the self-citation is not load-bearing. The main circularity-adjacent weakness is Section V.B: the HCCE parameters are calibrated on one representative instance of each type, and the same instance types (including those representatives) are then used in Section V.D to claim superiority for all instance types; this is in-sample tuning rather than a derivation. Separately, there is a non-circular correctness risk: Eq. (3) assigns last-machine completion times to force the amended order, but it does not enforce within-factory machine capacity when same-factory jobs are separated in the amended order. For f=2, m=1, u=4, AP1={i1,i2}, AP2={i3,i4}, buffer capacity 2, lambda'=(i1,i2,i3,i4), mu=(F1,F2,F1,F2), the sequence is IDAM-safe yet Eq. (3) yields completion times that are infeasible when p_i3=p_i4=5, while still outputting a makespan. This gap undermines the claim that IDAM guarantees feasible deadlock-free DAFSP schedules, but it is an omitted-proof or validity issue, not a circular reduction.

Assumptions & free parameters 4 free parameters · 3 assumptions · 0 invented entities

The central claims rest on the APP abstraction (a domain assumption), the greedy-safe IBA test, and four algorithm parameters tuned in-sample. No new physical entities are introduced.

free parameters (4)
  • PS (population size) = 50 (small), 35 (medium), 25 (large)
    Calibrated via Taguchi DOE in Section V.B on a subset of test instances; the fitted values differ by instance size and are used in the main experiments.
  • ep (elite archive proportion) = 0.2 (small), 0.5 (medium), 0.2 (large)
    Calibrated via Taguchi DOE in Section V.B; part of the in-sample tuning.
  • alpha (restart threshold) = 21 (small), 21 (medium), 3 (large)
    Calibrated via Taguchi DOE in Section V.B; part of the in-sample tuning.
  • cd (destruction ratio for LS4) = 0.1 (small), 0.1 (medium), 0.7 (large)
    Calibrated via Taguchi DOE in Section V.B; part of the in-sample tuning.
assumptions (3)
  • domain assumption All jobs are available at the buffer at time zero in the APP model; deadlock-freeness of the arrival order is independent of actual job completion times.
    Used in Section III.C to justify IDAM; not proven for the timed DAFSP.
  • domain assumption The assembly transition t_q fires as soon as all jobs of product q are in the buffer (Remark 2).
    This links deadlock-freeness to the APP model and is assumed in the makespan calculation.
  • domain assumption A deadlock-free sequence exists for every generated instance because buffer capacity Ψ is at least max_{q} |AP_q|.
    Instance generation in Section V.A sets Ψ in [b, 1.5b] with b = max |AP_q|; no proof that IDAM always finds such a sequence, though product-by-product ordering suggests existence.

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Cite this review

Pith. "Pith review of Hybrid Cooperative Co-Evolution Algorithm for Deadlock-prone Distributed Assembly Flowshop Scheduling with Limited buffers Using Petri nets." pith.science (2026). https://pith.science/paper/4GB3MK52

@misc{pith2026250114765,
  author       = {Pith},
  title        = {Pith review of: Hybrid Cooperative Co-Evolution Algorithm for Deadlock-prone Distributed Assembly Flowshop Scheduling with Limited buffers Using Petri nets},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/4GB3MK52}},
  note         = {Machine review of arXiv:2501.14765}
}
read the original abstract

The distributed assembly flowshop scheduling problem (DAFSP) can be applied to immense manufacturing environments. In DAFSP, jobs are first processed in distributed flowshops, and then assembled into final products by an assembly machine, which usually has limited buffers in practical application. This limited capacity can lead to deadlocks, halting job completion and blocking the entire manufacturing process. However, existing scheduling methods fail to address these deadlocks in DAFSP effectively. As such, we develop a hybrid cooperative co-evolution (HCCE) algorithm for solving the deadlock-prone DAFSP by minimizing the makespan. For the first time, we use Petri nets to analyze the deadlocks in DAFSP and propose a Petri net-based deadlock amending method (IDAM), which is further integrated into HCCE to ensure the feasibility (i.e., deadlock-freeness) of solutions. Importantly, HCCE contains an elite archive (EAR) and two subpopulations. It uses the problem-specific operators for heuristic initialization and global-search. To enhance the quality and diversity of solutions, an information transfer mechanism (ITM) is developed among subpopulation and EAR, and four local-search operators are performed sequentially on each individual in EAR. Finally, comprehensive experiments demonstrate the effectiveness and superiority of the proposed HCCE algorithm.

Figures

Figures reproduced from arXiv: 2501.14765 by the authors.

Figure 1
Figure 1. The diagram of a DAFSP [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 4
Figure 4. APP model of DAFSP [PITH_FULL_IMAGE:figures/full_fig_p005_4.png] view at source ↗
Figure 5
Figure 5. Fig.5. Processing of IDAM. (a) [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
Figures from the paper (3 more)
Figure 7
Figure 7. Figure 7: mCCEA framework where PS = 3 and AS = 1. Generate λ by taking μ r as the input for H2, r is a random integer set to 2. If Δ' is better than {λ 3 , μ 3}, or μ 3 is changed, set λ 3 = λ', Col1(3) = 2. Δ' = {λ', μ 2}. If Δ' is better than {λ 2 , μ 2}, set Col2(2) = 3. Π1 …
Figure 8
Figure 8. Figure 8: An example of the evolution process for λ sequence [PITH_FULL_IMAGE:figures/full_fig_p008_8.png]
Figure 9
Figure 9. Figure 9: Variation trend for compared algorithms. Table VII RESULTS OF THE FREIDMAN TEST Instance group Average rank Chi￾Square P-value HCCE1 HCCE2 HCCE3 HCCE bRPD S 3.65 3.35 2 1 27.545 0.0 M 3.65 3.35 2 1 27.545 0.0 L 3.90 3.10 2 1 28.920 0.0 aRPD S 3.60 3.40 2 1 27.120 0.0 M…

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Pith tools

Reviewed August 10, 2026 · model on record in the stance chip above.