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Quark: Implementing Convolutional Neural Networks Entirely on Programmable Data Plane

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arxiv 2501.15100 v2 pith:WUCUOJ74 submitted 2025-01-25 cs.NI

classification cs.NI
keywords quarknetworkasicdataintelplaneprogrammableswitch
verification ladder T0 review T1 audit T2 compute T3 formal
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abstract

The rapid development of programmable network devices and the widespread use of machine learning (ML) in networking have facilitated efficient research into intelligent data plane (IDP). Offloading ML to programmable data plane (PDP) enables quick analysis and responses to network traffic dynamics, and efficient management of network links. However, PDP hardware pipeline has significant resource limitations. For instance, Intel Tofino ASIC has only 10Mb SRAM in each stage, and lacks support for multiplication, division and floating-point operations. These constraints significantly hinder the development of IDP. This paper presents \quark, a framework that fully offloads convolutional neural network (CNN) inference onto PDP. \quark employs model pruning to simplify the CNN model, and uses quantization to support floating-point operations. Additionally, \quark divides the CNN into smaller units to improve resource utilization on the PDP. We have implemented a testbed prototype of \quark on both P4 hardware switch (Intel Tofino ASIC) and software switch (i.e., BMv2). Extensive evaluation results demonstrate that \quark achieves 97.3\% accuracy in anomaly detection task while using only 22.7\% of the SRAM resources on the Intel Tofino ASIC switch, completing inference tasks at line rate with an average latency of 42.66$\mu s$.

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  1. INSIGHT: A Survey of In-Network Systems for Intelligent, High-Efficiency AI and Topology Optimization

    cs.NI 2025-05 conditional

    A survey of in-network AI computing that catalogs architectures, model-compression methods, aggregation frameworks, and applications, but offers no new experimental results.

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