On Usage of Non-Volatile Memory as Primary Storage for Database Management Systems

Adri`a Armejach; Adrian Cristal; Naveed Ul Mustafa; Osman S. Unsal; Ozcan Ozturk

REVIEW 3 major objections 5 minor 71 references

On Usage of Non-Volatile Memory as Primary Storage for Database Management Systems

T0 review · 3 major / 5 minor · reviewed 2026-08-07 · deepseek-v4-flash

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Pith's one-line read This paper argues that redirecting a DBMS's buffer pointers into memory-mapped NVM files, plus helper-thread prefetching, cuts TPC-H query time by an average of 8% (up to 17%) over PostgreSQL on NVM and 23% (up to 54%) over disk.

desk verdict Solid engineering case study with clean SE2 pointer-redirection and helper-thread prefetching, but the 8% average speedup rests on DRAM emulation and may not transfer to real NVM. read the letter →

arxiv 2502.09431 v1 pith:7Q7HV7V7 submitted 2025-02-13 cs.DB

Naveed Ul Mustafa , Adri`a Armejach , Ozcan Ozturk , Adrian Cristal , Osman S. Unsal This is my paper

classification cs.DB

keywords non-volatilememoryrelationalDBMSPostgreSQLstorageenginememory-mappedI/OdataprefetchinghelperthreadsTPC-H

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper asks what a traditional disk-oriented database must change to treat non-volatile memory (NVM) as its primary storage. It answers with two storage-engine modifications to PostgreSQL: SE1 uses memory-mapped I/O to avoid kernel copies, and SE2 redirects buffer pointers directly into mapped NVM files, making reads copy-free while writes still go through the internal buffer cache to preserve consistency. The paper identifies a "data readiness" bottleneck--directly accessed NVM data arrives at the processor late, causing long-latency cache misses--and adds a general-purpose helper-thread prefetching library to hide it. With the best thread mapping, TPC-H query execution time falls by up to 17% (average 8%) versus unmodified PostgreSQL on NVM and up to 54% (average 23%) versus disk.

What carries the argument

The load-bearing machinery is the PtrRedirection Layer of SE2, a storage-engine change that replaces PostgreSQL's file layer with a layer that receives the buffer pointer (a pointer to the buffer-cache slot) and redirects it to the corresponding address of the file mapped from the NVM-backed file system. Reads then cost zero copies: the query code reads the tuple directly from the mapped NVM file. Writes keep PostgreSQL's consistency model by first copying the page from NVM back into the buffer slot and undoing the redirection, so updates still go through the internal buffer under MVCC. The second mechanism is a general-purpose helper-thread prefetching library: the computation thread enqueues a job holding a start address and a size, and helper threads bring that region into caches; the best scheme (M3) uses one helper on a different core to pull data into the last-level cache and a second helper on the computation core to pull it into private caches.

What would settle it

Run the same TPC-H scale-factor-100 workload on a machine with real byte-addressable NVM rather than a DRAM-backed PMFS partition, and compare the modified storage engine with the M3 helper-thread scheme against unmodified PostgreSQL on the same NVM; if the average wall-clock improvement over the NVM baseline is not close to the reported 8%, or the disk-relative gain is not close to 23%, the DRAM emulation is the likely culprit.

Watch

Extended reading notes

Core claim

The paper's central claim is that a disk-era DBMS can be made NVM-aware by pointer redirection rather than by copying data through the OS or the DBMS buffer cache. In SE2, the storage engine maps NVM files into the process address space and redirects PostgreSQL's buffer pointer for a page directly to the mapped NVM address, so a read incurs no copy; for writes it copies the page back into the internal buffer and undoes the redirection, preserving MVCC and ACID semantics. The paper further claims that the resulting user-level cache misses--the data readiness problem--are the main obstacle, and that a general-purpose helper-thread prefetching library with the M3 two-thread mapping hides them. With that library, query execution time improves by up to 17% (average 8%) against unmodified PostgreSQL on NVM and up to 54% (average 23%) against disk.

Load-bearing premise

The load-bearing premise, stated in Sections 3.3 and 5.1, is that NVM emulated by a reserved DRAM partition faithfully represents real non-volatile memory; if real NVM read latency or caching behavior differs from DRAM, the reported gains may not transfer.

Editorial extensions

If this is right

A conventional disk-oriented DBMS can capture a substantial share of NVM's benefit without a from-scratch redesign: only the storage-engine read path and a prefetching layer need to change.
Read-dominant decision-support workloads are the favorable case; the paper's gains concentrate in TPC-H queries dominated by sequential scans, not in compute-bound or small-data queries.
The helper-thread prefetching library is general purpose: any application that memory-maps NVM files and knows a block's address and size can use the same job-queue API.
Kernel execution time for query processing drops from about 10% of the baseline to about 0.05% on average, so the CPU cycles saved should grow with dataset size as long as NVM access latency stays near DRAM levels.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

A natural extension, not tested in the paper, is applying the pointer-redirection and helper-thread scheme to other disk-oriented DBMSs with similar buffer layers; the expected gain depends on how much of their workload is sequential scan over large relations.
If real NVM read latency turns out higher than the DRAM-like projections cited, SE2's zero-copy read path could lose its edge; the emulation-based 8% average is the main transfer risk.
The M3 split-prefetch idea could be tested in a vectorized or columnar executor, where access patterns are more regular than PostgreSQL's row-at-a-time model and might yield larger speedups.
The paper deliberately leaves logging and recovery out of scope; combining SE2 with NVM-based logging would be a natural next test for write-heavy OLTP workloads, where the write path still goes through buffers.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

The thing to know: this paper is a solid engineering case study, not a breakthrough. It modifies PostgreSQL's storage engine in two steps (SE1, SE2) to use memory-mapped NVM files via PMFS, eliminating kernel copy overhead for reads, and then adds a helper-thread prefetching library that brings data into caches ahead of the query thread. On a DRAM-emulated NVM setup, SE2 plus the M3 thread mapping gives an average 8% speedup over unmodified PostgreSQL on NVM, and up to 17% on some TPC-H queries.

Credit where due: the SE2 pointer-redirection trick is clean and well explained; the cycle breakdowns and LLC miss analyses are careful and honest. They report that SE1 is actually 3% slower on average, which is a negative result they don't hide. The helper-thread library with three mapping schemes (M1, M2, M3) is a genuine new artifact, and the M3 two-thread approach is a sensible design for hiding the latency of direct NVM access. The paper also correctly identifies the 'data readiness' bottleneck that plagues direct-access approaches.

Soft spots, in order of severity. First, the emulation. They reserve 224GB of DRAM for PMFS and justify it by saying NVM read latencies are projected to be similar to DRAM. That was already a stretch in 2019, and real Optane DIMMs have roughly 2-3x DRAM read latency. The extra 4% average gain from prefetching is exactly the component most sensitive to that latency. So the headline 8% should not be read as a prediction for real NVM hardware. A latency/bandwidth sweep or validation on Optane would be needed to make the claim transferable. Second, they exclude 6 of 22 TPC-H queries because they fail under PMFS. That is a selection bias; the reported averages are over the remaining 16. Third, single-run measurements without error bars make it hard to judge whether a 4% average difference is noise. Fourth, a minor internal inconsistency: the introduction says kernel execution time drops to 0.05%, but Section 8.1 and Figure 11 show 0.5%. That needs a correction.

The math and citation pattern are fine; no circular reasoning or fitted parameters. The paper is honest about its modest gains and the difficulty of applying prefetching in a complex DBMS.

Who this is for: anyone working on NVM-aware storage engines or on adapting traditional DBMSs to persistent memory. It deserves a serious referee; the emulation concern is real but does not invalidate the engineering contribution. I'd recommend engaging with it, with the expectation of a major revision that adds either real-hardware results or a latency-sensitivity analysis, and fixes the internal inconsistency.

Best, [Your name]

Referee Report

3 major / 5 minor

Summary. This paper studies how a traditional disk-oriented DBMS can be adapted to use non-volatile memory as primary storage. It modifies PostgreSQL's storage engine in two incremental steps: SE1 uses PMFS memory-mapped I/O to eliminate one of two kernel copies, and SE2 redirects PostgreSQL buffer pointers directly to PMFS-mapped NVM pages to eliminate copies entirely. The authors identify that direct access shifts LLC misses from kernel level to user level and develop a general-purpose helper-thread prefetching library to hide that latency. On a DRAM-emulated PMFS partition, SE2 with the M3 thread mapping reduces TPC-H query execution time by up to 17% and on average 8% relative to unmodified PostgreSQL on the same emulated NVM, and by up to 54%/23% relative to SSD-based PostgreSQL. The evaluation is based on 16 of the 22 TPC-H queries because some queries fail to complete under PMFS.

Significance. The work is a careful engineering study with a clear incremental methodology, a plausible cycle-level explanation of the observed bottlenecks (Figs. 8, 9, 13, 15), and a reusable prefetching library that is evaluated against multiple baselines. All results are direct performance measurements with no fitted parameters, so the internal arithmetic is not in question. The main value is in quantifying where storage-engine changes help and in identifying the 'data readiness' problem that arises when data is accessed directly from NVM. However, the headline results are obtained on DRAM-emulated NVM and on a subset of the TPC-H workload, so the external validity of the quantitative claims is the principal concern. If the 8% average improvement is confirmed on real NVM hardware or shown to be robust under a latency/bandwidth sensitivity analysis, the contribution would be solid and practically useful for adapting mainstream DBMSs to NVM.

major comments (3)

[Section 5.1 / Section 3.3] The load-bearing assumption of the evaluation is stated in Section 5.1: a 224GB PMFS partition is carved out of DRAM, and Section 3.3 justifies this by asserting that NVM read latencies are projected to be similar to DRAM. The paper's own references to Intel Optane DC PM (refs. 67-69) indicate that real NVM read latency is roughly 2-3x DRAM and that bandwidth characteristics differ. The benefit of SE2 depends on the trade-off between removing kernel-copy overhead and paying latency on user-level cache misses, and the helper-thread prefetching component is exactly the part most sensitive to memory latency: SE2 with the ad-hoc prefetching scheme gives a 4% average gain (Section 6.2), while the M3 scheme gives 8% (Section 8.2). Please add a sensitivity analysis that varies NVM read latency and bandwidth, or validate the results on real App Direct NVM hardware, and justify why the DRAM emulation is representative of the regime that determines the sign and magnitude of the improvement.
[Section 5.2] The paper reports results for only 16 of the 22 TPC-H queries, stating that 'some queries fail to complete under PMFS storage.' This is an explicit limitation, but it is not analyzed: the paper does not identify the six excluded queries, explain why they fail, or argue that the remaining 16 are representative of DSS workloads. Because all reported averages are computed over this subset, the conclusions are conditional on it. Please list the excluded queries, describe the failure mode, and either include them or provide a concrete argument that their exclusion does not change the conclusions.
[Figures 6-15 / Section 8.2] The experimental sections report point values without stating the number of runs or the variance across runs. Since the headline result is an 8% average improvement, and several queries show differences of only a few percent, it is not possible to tell whether the reported effect is larger than run-to-run noise. Please state the number of repetitions and report error bars or a variance analysis for the wall-clock time measurements in Figures 7 and 12, and for the cycle-level breakdowns that are used to explain the mechanism.

minor comments (5)

[Introduction] The Introduction states that kernel execution time 'drops to 0.05% on average' when the prefetching library is used, but Section 8.1 reports an average reduction to 0.5% for M1, M2, and M3. Please reconcile these numbers.
[Table 2] The PostgreSQL configuration parameters are written with spaces ('max wal size', 'work mem', 'effective cache'); use the actual PostgreSQL parameter names (max_wal_size, work_mem, effective_cache_size) so that the configuration can be reproduced.
[Section 5.2] Please specify the exact TPC-H scale factor and dataset size more carefully and clarify whether the 150GB figure includes both base tables and indexes; this is relevant to interpreting the 224GB PMFS partition size.
[Section 6.2] The sentence about Q02 says a query spends '18% of its execution time in data movement operations' and 'sequential scan makes only 20% of the database operations'; the terminology would benefit from separating 'fraction of execution time' from 'fraction of operations' to avoid confusion.
[Section 5.1] The paper should state whether the perf counter samples and wall-clock times were collected from the same runs or different runs; this affects the reliability of the cycle-level explanation in Figures 8, 9, 13, and 15.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: all results are direct measurements, no fitted parameters, no load-bearing self-citations, and negative results are reported honestly.

full rationale

The paper's claims (SE1/SE2 reduce copy operations; helper threads prefetch data) are evaluated by direct wall-clock TPC-H measurements on an emulation platform, not derived from any model or fitted parameter. No quantity is defined in terms of another derived quantity: kernel execution time, wall-clock time, LLC misses, and L1 misses are all measured with timers and perf. No fitting occurs anywhere; the helper-thread library parameters (thread count, mappings M1/M2/M3) are design choices compared experimentally against baselines, with honest negative results reported elsewhere (SE1 is 3% slower on average, Section 6.2; Q01, Q02, Q13, Q17, Q20 show no improvement, Section 8.2). The DRAM-based PMFS emulation (Section 5.1) is justified by external citations [32, 23, 31, 24] asserting projected NVM read latency similar to DRAM; this is a threat to external validity if real Optane-class latency differs, but it is not circular because the measured speedups are not constructed from that assumption. All references are external (PMFS [44], Arulraj et al. [23], Gao et al. [54], helper-thread literature [56, 57, 63, 64]); there are no self-citations, no imported uniqueness theorems, and no renamed-known-result presentation, since the paper explicitly credits helper-thread prefetching as 'a known technique' (Section 1). The 8% average improvement over pmfs base95 is a measured outcome of Section 8.2, not an equivalent-by-construction restatement of any input assumption.

Assumptions & free parameters 0 free parameters · 3 assumptions · 0 invented entities

The central claim rests on the emulation assumption and on workload selection; no free parameters are fitted and no new physical entities are postulated. The helper-thread library is a software artifact, not an invented entity.

assumptions (3)

domain assumption NVM read latency will be similar to DRAM read latency.
Section 3.3 states 'NVM technologies are projected to provide read latencies similar to DRAM' and Section 5.1 uses DRAM to emulate NVM.
domain assumption PMFS on reserved DRAM is a faithful emulation platform for NVM storage.
Section 5.1 sets up the emulation 'similar to that used by the PMFS authors' and assumes the DRAM partition provides features similar to NVM.
ad hoc to paper The 16 TPC-H queries that complete are representative of DSS workloads, and the 6 excluded queries would not change the conclusions.
Section 5.2 excludes queries that fail to complete under PMFS, without sensitivity analysis.

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Cite this review

Pith. "Pith review of On Usage of Non-Volatile Memory as Primary Storage for Database Management Systems." pith.science (2026). https://pith.science/paper/7Q7HV7V7

@misc{pith2026250209431,
  author       = {Pith},
  title        = {Pith review of: On Usage of Non-Volatile Memory as Primary Storage for Database Management Systems},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/7Q7HV7V7}},
  note         = {Machine review of arXiv:2502.09431}
}

read the original abstract

This paper explores the implications of employing non-volatile memory (NVM) as primary storage for a data base management system (DBMS). We investigate the modifications necessary to be applied on top of a traditional relational DBMS to take advantage of NVM features. As a case study, we modify the storage engine (SE) of PostgreSQL enabling efficient use of NVM hardware. We detail the necessary changes and challenges such modifications entail and evaluate them using a comprehensive emulation platform. Results indicate that our modified SE reduces query execution time by up to 45% and 13% when compared to disk and NVM storage, with average reductions of 19% and 4%, respectively. Detailed analysis of these results shows that while our modified SE is able to access data more efficiently, data is not close to the processing units when needed for processing, incurring long latency misses that hinder the performance. To solve this, we develop a general purpose library that employs helper threads to prefetch data from NVM hardware via a simple API. Our library further improves query execution time for our modified SE when compared to disk and NVM storage by up to 54% and 17%, with average reductions of 23% and 8%, respectively.

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