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REVIEW 2 major objections 6 minor 1 cited by

A Survey of Real-time Scheduling on Accelerator-based Heterogeneous Architecture for Time Critical Applications

T0 review · 2 major / 6 minor · reviewed 2026-08-15 · deepseek-v4-flash

Pith's one-line read This survey maps ten years of real-time scheduling on accelerator-based heterogeneous platforms, organizing the field by soft versus hard deadlines, task execution models, and application domains.

desk verdict A genuinely useful, well-organized survey that makes a few internal-consistency mistakes in its stated scope; worth refereeing, but the authors should fix the latency/QoS inclusion contradiction before publication. read the letter →

arxiv 2505.11970 v1 pith:B3GRN3KW submitted 2025-05-17 cs.DC cs.AR

classification cs.DCcs.AR
keywords real-timeschedulingheterogeneouscomputingGPUFPGATPUself-suspendingtasksDAGtaskchain
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper tries to establish that real-time scheduling on accelerator-based heterogeneous systems--chips that combine CPU cores with GPUs, TPUs, or FPGAs--has matured into a coherent research area that can be mapped by deadline type, task model, and application. It argues that the last decade divides naturally into soft-real-time work, which improves schedulability without strict response-time analysis, and hard-real-time work, which carries formal worst-case response-time guarantees, with a third stream driven by applications such as autonomous driving, perception, language models, satellites, and extended reality. A sympathetic reader would care because the survey supplies the categories and reference points needed to locate where a new scheduling problem fits and which existing techniques are candidates to extend.

What carries the argument

The organizing machinery is a two-axis taxonomy: deadline class (soft versus hard) crossed with accelerator count (single versus multiple), task execution model, and objective (timing only versus energy or thermal). The load-bearing task models are the self-suspending segmented model $\tau_i = (C^1_i, A^1_i, C^2_i, \ldots, A^{M_i-1}_i, C^{M_i}_i), D_i, T_i$, the directed acyclic graph (DAG) model, and the task-chain model, each mapped onto a real workload such as CNN inference, transformer attention, or ROS pipelines. The taxonomy does the work: it converts a list of papers into a decision tree that a researcher can enter with their deadline type, task shape, and accelerator count.

What would settle it

Run a systematic literature search over 2015-2025 for deadline-constrained scheduling on GPU, FPGA, TPU, or NPU platforms; if the majority of retrieved works are latency-, QoS-, or virtualization-driven, the survey's scope decision would place the field's center of gravity outside the map it claims to draw.

Watch

Extended reading notes

Core claim

On the paper's own terms, the discovery is organizational: the seemingly scattered literature on scheduling real-time tasks on CPU-plus-accelerator platforms can be read as a progression from architectural features through task models to scheduling objectives. It shows that three task models--the segmented self-suspension model, the directed acyclic graph (DAG) model, and the task-chain model--capture most existing analyses, and that soft-real-time designs (vendor schedulers, priority queues, spatial partitioning, energy and thermal heuristics) and hard-real-time designs (fixed-priority and EDF analyses, response-time bounds, multi-objective thermal and energy control) form distinct lineages. It also claims that application-driven work is where the field is currently expanding, and it closes by identifying open problems: platforms with more than two processor types, memory-bus copy overhead, co-designed CPU-plus-accelerator metrics, and standardized evaluation.

Load-bearing premise

The survey's claim to be comprehensive depends on its explicit decision to exclude latency- and QoS-driven scheduling and cloud-based virtualized accelerator servers, so if a large share of time-critical accelerator scheduling research falls in those excluded areas, the map is incomplete.

Editorial extensions

If this is right

  • A researcher with a new hard-deadline single-accelerator problem can locate the relevant analysis lineage, such as fixed-priority or EDF-like response-time bounds over self-suspending segments, without re-deriving the field.
  • Multi-accelerator systems shift the focus from response-time analysis to task-to-accelerator allocation, so new work there should expect to compare against allocation and load-balancing approaches rather than purely analytical schedulability tests.
  • Soft-real-time designs that tolerate occasional deadline misses can use vendor-provided mechanisms as baselines before adopting heuristic frameworks that add preemption, spatial partitioning, or energy and thermal control.
  • Application-driven scheduling, covering autonomous systems, perception, language models, satellites, and extended reality, is presented as the current frontier where deadline type, task model, and platform constraints are chosen together.
  • The survey's open problems imply that the next advances are likely to come from platforms with more than two processor types, explicit memory-copy modeling in schedules, and standardized evaluation metrics that allow fair comparison.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Editorial extension: the survey's observation that two different utilization definitions coexist, one CPU-dominant and one treating CPU and accelerator equally, suggests the field lacks a shared unit of load across processor types; a testable next step is a benchmark suite that reports both definitions and shows when scheduling conclusions flip.
  • Editorial extension: the task-chain model is likely to grow in importance as ROS 2 becomes the standard integration layer for robots using accelerators, so scheduling work that ignores chain-level data dependencies may increasingly miss the true end-to-end latency.
  • Editorial extension: because memory copies are modeled as non-preemptive stages, unified-memory platforms where CPU and accelerator share addresses may eventually blur the CPU-segment versus accelerator-segment distinction, which would strain the segmented model that much of the hard-real-time analysis relies on.
  • Editorial extension: a reader could test the taxonomy's completeness by applying it to papers outside the survey's scope, such as latency- or QoS-driven accelerator systems; if those papers resist the soft-versus-hard deadline distinction, the taxonomy would need a third axis.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 6 minor

Summary. The paper surveys real-time scheduling techniques for accelerator-based heterogeneous architectures, covering CPU-GPU, CPU-TPU, and CPU-FPGA systems. It organizes the material around task execution models (accelerator-only, self-suspending segmented model, DAG, and task chain), soft versus hard deadline classes, vendor and research-designed schedulers, multi-objective approaches (energy and thermal), and application-driven scheduling for autonomous systems, perception, language models, satellites, and extended reality. The survey claims to be comprehensive for the past ten years and concludes with open challenges such as multi-core heterogeneity, memory-copy overheads, response-time analysis, and standardized evaluation.

Significance. If the scope were applied consistently, this would be a valuable reference map for researchers entering real-time scheduling on accelerator-based heterogeneous platforms. The paper's strengths are its broad collection of recent works, the explicit task-model taxonomy, the structured tables summarizing soft/hard real-time and application-driven schedulers, and the honest enumeration of open problems. It does not make new formal claims, so correctness hinges on accurate representation and consistent selection criteria; the tables and descriptions are generally faithful to the cited works.

major comments (2)
  1. [II.B.2 vs IV.B.2, VI.C, VI.E, Table IV] The stated inclusion criterion is inconsistent with several included works. Section II.B.2 says a task qualifies as real-time only if it has hard or soft deadlines, and that latency- or QoS-driven scheduling approaches are not covered. However, Pegasus (Section IV.B.2, Table II) is included with a policy named SLAF described as 'feedback-driven adjustments for QoS'; Llumnix (Section VI.C, Table IV) is included for 'differentiated Service Level Objectives (SLOs)' without any deadline model; and BOXR (Section VI.E, Table IV) is included on the basis of M2D/C2D latency budgets. These works are latency/QoS-driven by the survey's own definition, so the 'comprehensive survey' claim is underspecified: either the exclusion should be enforced or the scope should be broadened and explicitly justified.
  2. [II.B.2 vs IV.B.2 and VI.C] The same scope paragraph excludes cloud-based virtualized accelerator servers, yet Pegasus is a hypervisor-level scheduling system for virtualized GPU access and Llumnix is a datacenter-scale LLM serving system. This contradicts the stated emphasis on single-machine embedded and mobile real-time platforms. The authors should either remove these entries or revise the scope statement to acknowledge that some cloud/virtualized or latency-driven works are included because of their deadline-related contributions.
minor comments (6)
  1. [IV.B.1] The name 'Elloit' should be 'Elliott'; the same misspelling appears in Table II as 'Elliott [76] et al.'.
  2. [V.C, PredJoule paragraph] The phrase 'zhDNN stages' appears to be a typo and should be corrected to 'DNN stages' or the intended technical term.
  3. [III.B.3] The word 'espeacially' in the DAG model description should be 'especially'.
  4. [Table I] The entry 'Kernal' under the FRED row should be 'Kernel'.
  5. [Table IV] The scheduling algorithm label 'N P F Pf lex' has a formatting artifact and should read 'NPFPflex' consistently with the text in Section VI.B.
  6. [V.C] The phrase 'V oltage and Frequency Scaling' contains an unintended space and should be 'Voltage and Frequency Scaling'.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the survey makes no predictive or derivational claims; its inclusion criteria are internally inconsistent for a few QoS/latency-oriented works, but that is a coverage issue, not circular reasoning.

full rationale

This paper is a survey, not a derivation. It does not fit parameters to data, derive predictions from assumptions, or invoke a self-citation chain to force a conclusion. Its central claim, that it presents a comprehensive survey of real-time scheduling techniques for accelerator-based heterogeneous platforms, is supported by the organization of the reviewed literature rather than by any formal derivation. The scope statement in Section II.B.2 explicitly excludes latency- and QoS-driven scheduling approaches, yet later sections describe works such as Pegasus [79], Llumnix [112], and BOXR [114] using QoS, SLO, and latency language. That is an internal inconsistency in the survey's inclusion boundary and could weaken the comprehensiveness claim, but it is not circularity: the included works are external publications, and the survey does not define its object of study in terms of its own conclusions. Self-citations, such as references to RTGPU [58], SHAPE [59], and SCENIC [99], are used to describe prior work by the authors and to motivate open problems; none of these citations is load-bearing in the sense of replacing an argument with an unverified assertion by the same authors. No prediction, theorem, schedule, or schedulability result is produced in the paper, so there is no fitted input renamed as a prediction and no equation that reduces to its own input by construction. The honest finding is therefore no significant circularity.

Assumptions & free parameters 0 free parameters · 0 assumptions · 0 invented entities

This is a survey; it introduces no free parameters, derives no new equations, and posits no new entities. The task-model categories are the authors' organizational scheme, described from prior literature.

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Cite this review

Pith. "Pith review of A Survey of Real-time Scheduling on Accelerator-based Heterogeneous Architecture for Time Critical Applications." pith.science (2026). https://pith.science/paper/B3GRN3KW

@misc{pith2026250511970,
  author       = {Pith},
  title        = {Pith review of: A Survey of Real-time Scheduling on Accelerator-based Heterogeneous Architecture for Time Critical Applications},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/B3GRN3KW}},
  note         = {Machine review of arXiv:2505.11970}
}
read the original abstract

Accelerator-based heterogeneous architectures, such as CPU-GPU, CPU-TPU, and CPU-FPGA systems, are widely adopted to support the popular artificial intelligence (AI) algorithms that demand intensive computation. When deployed in real-time applications, such as robotics and autonomous vehicles, these architectures must meet stringent timing constraints. To summarize these achievements, this article presents a comprehensive survey of real-time scheduling techniques for accelerator-based heterogeneous platforms. It highlights key advancements from the past ten years, showcasing how proposed solutions have evolved to address the distinct challenges and requirements of these systems. This survey begins with an overview of the hardware characteristics and common task execution models used in accelerator-based heterogeneous systems. It then categorizes the reviewed works based on soft and hard deadline constraints. For soft real-time approaches, we cover real-time scheduling methods supported by hardware vendors and strategies focusing on timing-critical scheduling, energy efficiency, and thermal-aware scheduling. For hard real-time approaches, we first examine support from processor vendors. We then discuss scheduling techniques that guarantee hard deadlines (with strict response time analysis). After reviewing general soft and hard real-time scheduling methods, we explore application- or scenario-driven real-time scheduling techniques for accelerator-enabled heterogeneous computing platforms. Finally, the article concludes with a discussion of open issues and challenges within this research area.

Figures

Figures reproduced from arXiv: 2505.11970 by the authors.

Figure 1
Figure 1. Real-time scheduling of parallel tasks on the heterogeneous architecture. [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Overview of this survey. general-purpose homogeneous processors, surveys have also addressed real-time scheduling on limited preemptive proces￾sors [20] and implementations of real-time scheduling in the Linux kernel [21]. (3) For artificial intelligence applications, earlier works have summarized scheduling and load-balancing strategies [22], [23], as well as neural network training tech￾niques [24], [25], primaril… view at source ↗
Figure 3
Figure 3. Different task modeling approaches. GPU research [52], [53]. In addition, researchers have pro￾posed architectural support for spatial partitioning in systolic arrays [42], which serve as accelerators for general matrix multiplication and convolution operations. These architectural advancements, aimed at improving accelerator flexibility and supporting real-time performance, are summarized in Table I. Therefore, the… view at source ↗
Figures from the paper (3 more)
Figure 4
Figure 4. Figure 4: Tree Diagram for Soft Real-Time Tasks Scheduling. [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 5
Figure 5. Figure 5: Tree Diagram for Hard Real-Time Tasks Scheduling. [PITH_FULL_IMAGE:figures/full_fig_p009_5.png]
Figure 6
Figure 6. Figure 6: Tree Diagram for Applications. process are leveraged to guide the redesign process, facilitating the development of a more efficient and systematic design methodology for AD systems. SCENIC [99] introduces a novel end-to-end co-design framework that integrates capabili…

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Pith tools

Reviewed August 15, 2026 · model on record in the stance chip above.