Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution | Paper Citation Record

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This paper cites Singular value decomposition (svd) and generalized singular value decomposition.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Singular value decomposition (svd) and generalized singular value decomposition

Reference 1

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This paper cites Xcel-ram: Accelerating binary neural networks in high-throughput sram compute arrays.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Xcel-ram: Accelerating binary neural networks in high-throughput sram compute arrays

Reference 2

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This paper cites Llama 3.2: Multilingual large language models.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Llama 3.2: Multilingual large language models

Reference 3

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This paper cites In-memory low-cost bit-serial addition using commodity dram technology.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution In-memory low-cost bit-serial addition using commodity dram technology

Reference 4

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Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Unresolved cited work

Reference 5

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Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Artisan Memory Compilers

Reference 6

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This paper cites Longformer: The Long-Document Transformer.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Longformer: The Long-Document Transformer

Reference 7

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This paper cites Improving language models by retrieving from trillions of tokens.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Improving language models by retrieving from trillions of tokens

Reference 8

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This paper cites Neural-pim: Efficient processing-in-memory with neural approximation of pe- ripherals.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Neural-pim: Efficient processing-in-memory with neural approximation of pe- ripherals

Reference 9

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This paper cites The devil is in details: Delving into lite ffn design for vision transformers.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution The devil is in details: Delving into lite ffn design for vision transformers

Reference 10

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This paper cites Prime: a novel processing-in-memory architecture for neural network computation in reram-based main memory.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Prime: a novel processing-in-memory architecture for neural network computation in reram-based main memory

Reference 11

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This paper cites BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding

Reference 12

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Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Unresolved cited work

Reference 13

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This paper cites An image is worth 16x16 words: Transformers for image recognition at scale.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution An image is worth 16x16 words: Transformers for image recognition at scale

Reference 14

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Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Unresolved cited work

Reference 15

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This paper cites Computedram: In-memory compute using off-the-shelf drams.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Computedram: In-memory compute using off-the-shelf drams

Reference 16

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This paper cites A variation-tolerant in-memory machine learning classifier via on-chip training.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution A variation-tolerant in-memory machine learning classifier via on-chip training

Reference 17

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This paper cites Sabry, Marios Barlas, Laurent Grenouillet, Jean Coignus, Edith Beigne, Tony Wu, Binh Q.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Sabry, Marios Barlas, Laurent Grenouillet, Jean Coignus, Edith Beigne, Tony Wu, Binh Q

Reference 18

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This paper cites Mamba: Linear-Time Sequence Modeling with Selective State Spaces.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Mamba: Linear-Time Sequence Modeling with Selective State Spaces

Reference 19

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This paper cites A nonvolatile al-edge processor with 4mb slc-mlc hybrid-mode reram compute-in-memory macro and 51.4-251tops/w.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution A nonvolatile al-edge processor with 4mb slc-mlc hybrid-mode reram compute-in-memory macro and 51.4-251tops/w

Reference 20

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This paper cites A four-megabit compute-in-memory macro with eight-bit precision based on cmos and resistive random-access memory for ai edge devices.Nature Electronics, 4(12):921–930, 2021.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution A four-megabit compute-in-memory macro with eight-bit precision based on cmos and resistive random-access memory for ai edge devices.Nature Electronics, 4(12):921–930, 2021

Reference 21

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This paper cites Floatpim: In- memory acceleration of deep neural network training with high precision.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Floatpim: In- memory acceleration of deep neural network training with high precision

Reference 22

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This paper cites Circuit design of rram-based neuromorphic hardware systems for classification and modified hebbian learning.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Circuit design of rram-based neuromorphic hardware systems for classification and modified hebbian learning

Reference 23

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This paper cites Rehy: A reram-based digital/analog hybrid pim architecture for accelerating cnn training.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Rehy: A reram-based digital/analog hybrid pim architecture for accelerating cnn training

Reference 24

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This paper cites Rehy: A reram-based digital/analog hybrid pim architecture for accelerating cnn training.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Rehy: A reram-based digital/analog hybrid pim architecture for accelerating cnn training

Reference 25

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This paper cites Ten lessons from three generations shaped google’s tpuv4i: Industrial product.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Ten lessons from three generations shaped google’s tpuv4i: Industrial product

Reference 26

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Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Samba: spar- sity aware in-memory computing based machine learning accelerator

Reference 27

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This paper cites Learning multiple layers of features from tiny images.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Learning multiple layers of features from tiny images

Reference 28

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This paper cites A 3.1 mw 8b 1.2 gs/s single-channel asynchronous sar adc with alternate comparators for enhanced speed in 32 nm digital soi cmos.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution A 3.1 mw 8b 1.2 gs/s single-channel asynchronous sar adc with alternate comparators for enhanced speed in 32 nm digital soi cmos

Reference 29

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This paper cites 25.4 a 20nm 6gb function-in-memory dram, based on hbm2 with a 1.2 tflops pro- grammable computing unit using bank-level parallelism, for machine learning applications.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution 25.4 a 20nm 6gb function-in-memory dram, based on hbm2 with a 1.2 tflops pro- grammable computing unit using bank-level parallelism, for machine learning applications

Reference 30

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This paper cites Asadi: Accelerating sparse attention using diagonal-based in-situ computing.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Asadi: Accelerating sparse attention using diagonal-based in-situ computing

Reference 31

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This paper cites Hardsea: Hybrid analog-reram clustering and digital-sram in-memory computing accelerator for dynamic sparse self- attention in transformer.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Hardsea: Hybrid analog-reram clustering and digital-sram in-memory computing accelerator for dynamic sparse self- attention in transformer

Reference 32

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This paper cites An area-and energy-efficient spiking neural network with spike-time-dependent plasticity realized with sram processing-in-memory macro and on-chip unsupervised learning.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution An area-and energy-efficient spiking neural network with spike-time-dependent plasticity realized with sram processing-in-memory macro and on-chip unsupervised learning

Reference 33

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This paper cites Hard- ware accelerator for multi-head attention and position-wise feed-forward in the transformer.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Hard- ware accelerator for multi-head attention and position-wise feed-forward in the transformer

Reference 34

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This paper cites Lightformer: Light-weight transformer using svd-based weight transfer and parameter sharing.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Lightformer: Light-weight transformer using svd-based weight transfer and parameter sharing

Reference 35

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This paper cites Marcus, Beatrice Santorini, and Mary Ann Marcinkiewicz.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Marcus, Beatrice Santorini, and Mary Ann Marcinkiewicz

Reference 36

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This paper cites The WikiText Long Term Dependency Language Model- ing Dataset.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution The WikiText Long Term Dependency Language Model- ing Dataset

Reference 37

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This paper cites Pointer sentinel mixture models, 2016.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Pointer sentinel mixture models, 2016

Reference 38

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This paper cites Leave No Context Behind: Efficient Infinite Context Transformers with Infini-attention.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Leave No Context Behind: Efficient Infinite Context Transformers with Infini-attention

Reference 39

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This paper cites ADC Performance Survey 1997-2024.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution ADC Performance Survey 1997-2024

Reference 40

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This paper cites Fine-grained dram: Energy- efficient dram for extreme bandwidth systems.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Fine-grained dram: Energy- efficient dram for extreme bandwidth systems

Reference 41

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Observation 45fc2d0c-09ae-4d61-981a-c328645b92d5 · outbound

This paper cites Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Training and operation of an integrated neuromorphic network based on metal-oxide memristors

Reference 42

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This paper cites Fact: Ffn-attention co-optimized transformer architecture with eager correlation prediction.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Fact: Ffn-attention co-optimized transformer architecture with eager correlation prediction

Reference 43

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Observation 71c9e6b6-f5d8-4247-8bda-9dbcf64a3139 · outbound

This paper cites Radford, Jeffrey Wu, R.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Radford, Jeffrey Wu, R

Reference 44

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Observation 552d7d06-a0ed-4f50-8782-556646a82adb · outbound

This paper cites Language models are unsupervised multitask learners.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Language models are unsupervised multitask learners

Reference 45

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This paper cites Adap- tive programming in multi-level cell reram.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Adap- tive programming in multi-level cell reram

Reference 47

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Observation b5f58417-9c0f-454b-bedd-7c02c26667d4 · outbound

This paper cites Associative learning of a three-terminal memristor network for digits recognition.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Associative learning of a three-terminal memristor network for digits recognition

Reference 48

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.270998Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation ddff2b3d-eeb5-4183-ae73-0bd2146f39f5 · outbound

This paper cites Analysis of power consumption and linearity in capacitive digital-to-analog converters used in successive approximation adcs.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Analysis of power consumption and linearity in capacitive digital-to-analog converters used in successive approximation adcs

Reference 49

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.256384Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 7379fb1a-f862-4241-8c26-a2131d083956 · outbound

This paper cites Stanley Williams, and Vivek Srikumar.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Stanley Williams, and Vivek Srikumar

Reference 50

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.240801Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 5068c3e7-98d3-4ca6-b1f3-8b35cb73e842 · outbound

This paper cites Stanley Williams, and Vivek Srikumar.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Stanley Williams, and Vivek Srikumar

Reference 51

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.224283Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 653b92a2-3779-4b28-9b40-f72bd5b6af59 · outbound

This paper cites Isaac: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Isaac: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars

Reference 52

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.208646Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation bd534139-3f2c-4aa3-b1b4-2c0b2044e912 · outbound

This paper cites Pci express ® 6.0 specification at 64.0 gt/s with pam- 4 signaling: a low latency, high bandwidth, high reliability and cost-effective interconnect.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Pci express ® 6.0 specification at 64.0 gt/s with pam- 4 signaling: a low latency, high bandwidth, high reliability and cost-effective interconnect

Reference 53

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.192897Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 45feb363-a0b2-4f0d-8c52-a82e4f4d7734 · outbound

This paper cites Relaxing non-volatility for fast and energy-efficient stt-ram caches.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Relaxing non-volatility for fast and energy-efficient stt-ram caches

Reference 54

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:59.172476Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 170f42b0-a4d6-48de-90d7-9ae841337e1e · outbound

This paper cites 52.5 tops/w 1.7 ghz reconfigurable xgboost inference accelerator based on modular-unit-tree with dynamic data and compute gating.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution 52.5 tops/w 1.7 ghz reconfigurable xgboost inference accelerator based on modular-unit-tree with dynamic data and compute gating

Reference 55

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:58.886737Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 9c10515b-1aee-4b87-8767-66fbcb341a16 · outbound

This paper cites Ef- ficient transformer acceleration via reconfiguration for encoder and decoder mod- els and sparsity-aware algorithm mapping.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Ef- ficient transformer acceleration via reconfiguration for encoder and decoder mod- els and sparsity-aware algorithm mapping

Reference 56

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:58.667869Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 4ae3a65d-d2c9-4883-b478-0084a7d281b0 · outbound

This paper cites Scaling equations for the accurate prediction of cmos device performance from 180 nm to 7 nm.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Scaling equations for the accurate prediction of cmos device performance from 180 nm to 7 nm

Reference 57

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:58.397835Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 3b746808-4b06-4d2c-a8f1-0098887185ec · outbound

This paper cites Logic de- sign within memristive memories using memristor-aided logic (magic).

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Logic de- sign within memristive memories using memristor-aided logic (magic)

Reference 58

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:58.073627Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation c50a5bcb-daed-412e-9ba6-05c7dc4fdd3f · outbound

This paper cites Exploring Transformers in Natural Language Generation: GPT, BERT, and XLNet.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Exploring Transformers in Natural Language Generation: GPT, BERT, and XLNet

Reference 59

Resolution: unresolved; no resolver link, observed 2026-08-07T15:30:53.658598Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2dcf0382-8d17-4fb2-a11a-f263e2202b7b · outbound

This paper cites Racer: Bit-pipelined process- ing using resistive memory.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Racer: Bit-pipelined process- ing using resistive memory

Reference 60

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.787587Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation d9620198-a90a-4e48-a0f3-a6481bceac8d · outbound

This paper cites 33.1 a 74 tmacs/w cmos-rram neurosynaptic core with dynamically reconfigurable dataflow and in-situ transposable weights for probabilistic graphical models.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution 33.1 a 74 tmacs/w cmos-rram neurosynaptic core with dynamically reconfigurable dataflow and in-situ transposable weights for probabilistic graphical models

Reference 61

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.712126Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation a8118b30-b163-4621-a6f3-b422e5b93873 · outbound

This paper cites GLUE: A Multi-Task Benchmark and Analysis Platform for Natural Language Understanding.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution GLUE: A Multi-Task Benchmark and Analysis Platform for Natural Language Understanding

Reference 62

Resolution: unresolved; no resolver link, observed 2026-08-07T15:30:54.027152Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 16966872-92a6-47db-b644-5e4d69f5a111 · outbound

This paper cites an unresolved cited work.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Unresolved cited work

Reference 63

Resolution: unresolved; no resolver link, observed 2026-08-07T15:30:54.124839Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 764fc092-3ef1-4749-9335-818ff233ae8c · outbound

This paper cites HAT: Hardware-Aware Transformers for Efficient Natural Language Processing.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution HAT: Hardware-Aware Transformers for Efficient Natural Language Processing

Reference 64

Resolution: unresolved; no resolver link, observed 2026-08-07T15:30:54.153630Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7a049959-4844-4a1b-b827-9a8b06f55747 · outbound

This paper cites Augmenting language models with long-term memory.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Augmenting language models with long-term memory

Reference 65

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.595079Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation ec778f6b-b593-43a6-8e39-47b4075ddc3f · outbound

This paper cites Beacongnn: Large-scale gnn acceleration with out-of-order streaming in-storage computing.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Beacongnn: Large-scale gnn acceleration with out-of-order streaming in-storage computing

Reference 66

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.410832Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 1c6e6b14-e851-4956-97ae-3e5c7c029be8 · outbound

This paper cites Phase change memory.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Phase change memory

Reference 67

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.268742Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 12583fac-06a6-4210-85fa-e2c236779bb1 · outbound

This paper cites Pim gpt a hybrid process in memory accelerator for autoregressive transformers.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Pim gpt a hybrid process in memory accelerator for autoregressive transformers

Reference 68

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:57.124110Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 772c936c-c128-4729-81e1-203ed2eff73a · outbound

This paper cites 16.1 a 22nm 4mb 8b-precision reram computing-in-memory macro with 11.91 to 195.7 tops/w for tiny ai edge devices.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution 16.1 a 22nm 4mb 8b-precision reram computing-in-memory macro with 11.91 to 195.7 tops/w for tiny ai edge devices

Reference 69

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.984087Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation e2c8d75d-ac25-470e-886b-e3674aca1a74 · outbound

This paper cites Processing-in-memory using optically-addressed phase change memory.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Processing-in-memory using optically-addressed phase change memory

Reference 70

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.822644Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation a39993bb-7983-4421-abe4-07fccf393013 · outbound

This paper cites Fsl-hdnn: A 5.7 tops/w end-to-end few-shot learning classifier accelerator with feature extraction and hyperdimensional computing.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Fsl-hdnn: A 5.7 tops/w end-to-end few-shot learning classifier accelerator with feature extraction and hyperdimensional computing

Reference 71

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.647531Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 1c1abb5d-e7c8-405c-9dcc-bf6b56672c17 · outbound

This paper cites Retransformer: Reram-based processing-in-memory architecture for transformer acceleration.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Retransformer: Reram-based processing-in-memory architecture for transformer acceleration

Reference 72

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.486388Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 2e5f45e9-658b-4949-a2e3-4cad7d444354 · outbound

This paper cites Retransformer: Reram-based processing-in-memory architecture for transformer acceleration.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Retransformer: Reram-based processing-in-memory architecture for transformer acceleration

Reference 73

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.328470Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 996814c9-1bb3-4eb1-9967-9b614007cd93 · outbound

This paper cites Fully hardware-implemented memristor convolutional neural network.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Fully hardware-implemented memristor convolutional neural network

Reference 74

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.188293Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 13a98ef2-20be-433c-a3f0-180b8c11af2e · outbound

This paper cites Sparse attention acceleration with synergistic in-memory pruning and on-chip recomputation.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Sparse attention acceleration with synergistic in-memory pruning and on-chip recomputation

Reference 75

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:56.087578Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation ebd11634-9b97-426d-80e3-f92d7bc7dd4b · outbound

This paper cites vision-transformers-cifar10: Training vision transformers (vit) and related models on cifar-10.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution vision-transformers-cifar10: Training vision transformers (vit) and related models on cifar-10

Reference 76

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:55.929108Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 15d5fafb-9fd4-4763-b9ff-6dc5bcb49f7f · outbound

This paper cites Rram for compute- in-memory: From inference to training.IEEE Transactions on Circuits and Systems I: Regular Papers, 68(7):2753–2765, 2021.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Rram for compute- in-memory: From inference to training.IEEE Transactions on Circuits and Systems I: Regular Papers, 68(7):2753–2765, 2021

Reference 77

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:55.804351Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 2356f4d2-3670-48ca-b069-0f36c77972cb · outbound

This paper cites Neuro-inspired computing chips.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Neuro-inspired computing chips

Reference 78

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:55.646552Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 013f6fdf-8f2b-4e28-9ff0-e77a65739617 · outbound

This paper cites Transpim: A memory-based acceleration via software-hardware co-design for transformer.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution Transpim: A memory-based acceleration via software-hardware co-design for transformer

Reference 79

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:55.388902Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation e57e6d77-f225-4194-bc04-4fe593bb948a · outbound

This paper cites The future of electronics based on memristive systems.

Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution The future of electronics based on memristive systems

Reference 80

Resolution: verified fuzzy; raw_fallback, observed 2026-08-07T15:30:55.306157Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

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Reference resolution

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Pith citing papers