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REVIEW 3 major objections 5 minor 28 references

CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs

T0 review · 3 major / 5 minor · reviewed 2026-08-07 · deepseek-v4-flash

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Pith's one-line read A new dataset tracks CPU and GPU carbon footprints and shows AI demand pushed emissions past 50x the 2016 baseline.

desk verdict A genuinely useful first dataset for processor sustainability, whose headline 50x AI-boom number is built on an unvalidated shipment assumption and should be demoted pending sensitivity analysis. read the letter →

arxiv 2506.10373 v1 pith:XEYSIZZB submitted 2025-06-12 cs.AR

Jiajun Hu , Chetan Choppali Sudarshan , Vidya A. Chhabria , Aman Arora This is my paper · ORCID
classification cs.AR
keywords carbonfootprintCPUsustainabilityGPUembodiedAIemissionschipletarchitectureprocessorbenchmarkinglifecycleassessment
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

CarbonSet is a dataset covering more than 1,000 CPUs and GPUs from the past decade, combining design, performance, and carbon-footprint metrics across the full chip lifecycle. The authors use it to ask whether modern flagship processors are becoming more sustainable, and their central answer is no: while performance per unit of carbon has improved sharply, total carbon emissions from datacenter GPUs have grown more than 50-fold since 2016, driven mainly by the AI boom's explosive increase in shipments rather than by per-chip inefficiency. The paper argues that this makes deployment volume, not unit-level design, the dominant lever on processor carbon, and that embodied manufacturing emissions are becoming a larger share of the lifecycle footprint as process nodes shrink. A sympathetic reader would take the paper's contribution to be the first large-scale, openly available processor sustainability benchmark that supports this kind of trend analysis and design benchmarking.

What carries the argument

The central mechanism is a probabilistic extension of the ECO-CHIP carbon-footprint model: instead of a single CFP value, CarbonSet produces a distribution of lifecycle carbon estimates by treating defect density, energy-per-area, carbon intensity, and gas-per-area as probability distributions, then running 10,000-sample Monte Carlo simulations. The mean of each distribution becomes the representative CFP per processor, letting the dataset support trend analyses and tradeoff metrics such as performance per CFP, embodied CFP per area (ECFPA), and performance per ECFPA.

What would settle it

A direct check would be to compare the paper's flagship-only shipment estimates against NVIDIA's actual unit-shipment disclosures or third-party teardown and procurement data for datacenter GPUs from 2016 to 2023; if total shipped units grew by, say, less than 20x while total CO2 still exceeded 50x the baseline, the conclusion that deployment volume dominates over per-chip efficiency would need revision.

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Extended reading notes

Core claim

The paper discovers that flagship GPUs and CPUs remain far from sustainable design: operational carbon still dominates lifecycle emissions, but the share of embodied carbon is rising with advanced process nodes. Most strikingly, the authors estimate that datacenter GPU shipments, driven by AI demand, have pushed total CO2 emissions from these chips to more than 50 times their 2016 level, even though per-chip performance efficiency improved by roughly 120x over the same period. Additional findings include that manufacturing cost and selling price are not reliable proxies for embodied carbon; that extending processor lifetime into the multi-year range is needed to amortize embodied emissions, especially at high idle times; and that chiplet architectures are not universally more sustainable, with monolithic designs remaining preferable below roughly 200 $mm^{2}$ of chip area.

Load-bearing premise

The 50x total-emissions growth rests on estimating GPU shipments by assuming NVIDIA's datacenter revenue comes solely from selling the latest flagship GPU at its highest price with a 75% profit margin, so if the revenue actually includes non-GPU products, older architectures, or volume discounts, the shipment count and the 50x multiplier change.

Editorial extensions

If this is right

  • If the 50x total-emissions estimate is right, reducing processor carbon requires addressing deployment growth and utilization, not only per-chip efficiency.
  • The dataset enables Moore's-law-style trend analysis for sustainability, letting designers see which process-node or architecture choices actually lower lifecycle carbon.
  • A fixed three-year, 60%-idle lifetime model means reported operational CFPs are comparable across chips, but real-world deployment choices can shift the balance between embodied and operational carbon.
  • The chiplet analysis suggests that design-space exploration for sustainable chips should treat chiplet count as a tunable axis, with the optimal choice depending on total chip area.
  • Because the dataset is public, it can serve as a common reference for companies estimating device lifetime carbon for life-cycle assessments and eco-labeling.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The paper's 50x figure is an output of an assumption chain that treats NVIDIA datacenter revenue as coming solely from flagship GPU sales at a 75% margin and top list price; a more realistic revenue mix could change the multiplier, so the strongest reading is that total growth is very large rather than exactly 50x.
  • The same probabilistic CFP methodology could be applied to other processor families, mobile SoCs, or future accelerator designs, extending CarbonSet's trend analysis beyond the flagship Intel and NVIDIA parts it currently highlights.
  • A testable extension would be to weight the 50x estimate by actual datacenter GPU lifetimes and utilization data; if real deployment lifetimes are shorter than the assumed three years, the embodied-carbon share and the urgency of extending lifetimes would both increase.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. CarbonSet curates a dataset of over 1,000 CPUs and GPUs, evaluates their carbon footprint using a probabilistic extension of the ECO-CHIP model, and analyzes sustainability trends over roughly the last decade. The paper reports that single-chip CFP has not dramatically worsened, but that AI-driven shipment growth has made total processor CFP exceed 50× the 2016 baseline. It also presents case studies on manufacturing cost versus embodied CFP, lifetime amortization of embodied CFP, and chiplet versus monolithic manufacturing CFP. The dataset and the Monte Carlo modeling procedure are the paper's main contributions, and the trend analysis is framed as a Moore's-law-like sustainability benchmark.

Significance. If the central quantitative claims are validated, CarbonSet would be a useful community resource: it is the first large-scale processor-level sustainability benchmark with probabilistic CFP ranges, it uses external input distributions, and its performance-per-CFP and ECFPA metrics provide a concrete framework for carbon-aware design-space exploration. The authors are also careful to base their simulations on 10,000 Monte Carlo samples and to make the dataset available. However, the headline 50× total-CFP figure is not a direct measurement: it is computed from a stylized revenue-to-shipment reconstruction and from a per-chip CFP scaling for the H100 that is not described. The qualitative conclusion that shipment growth rather than per-chip CFP dominates recent total emissions may survive a more careful analysis, but the specific 50× multiplier is not robust as currently supported, and the paper does not quantify uncertainty in its trend plots even though it advertises a probabilistic model.

major comments (3)
  1. [4.3] The headline 50× total-CFP increase rests entirely on the shipment reconstruction in Section 4.3, where NVIDIA Datacenter revenue is assumed to come 'solely from the latest flagship GPU sales with a 75% profit margin while being sold at the highest price.' Each of these three assumptions has an unsigned bias: the Datacenter segment includes Mellanox networking, software, and non-flagship products, which would inflate GPU unit counts if all revenue is attributed to flagship silicon; using MSRP instead of realized system-level ASPs would deflate unit counts; and the role of the '75% profit margin' is never specified and is applied inconsistently with revenue-based accounting. The text defends the estimate as 'conservative' only on the ASP side. Because the total-CFP multiplier is the product of unit count and per-chip CFP, the paper needs a bounded sensitivity analysis over revenue mix, margin, and ASP before the abstract's 50× claim can be considered substantiated.
  2. [4.3, Footnote 1] The H100, which dominates the 2022–2023 window in Fig. 6, is assigned a 5 nm CFP by an undisclosed 'scaled based on existing process node metrics' procedure. Since manufacturing CFP enters per-chip CFP and therefore total CFP, the scaling formula, its calibration source, and the resulting uncertainty range must be reported. Without this, the late-window total-CFP trend is not reproducible and the 50× figure cannot be independently checked.
  3. [3.1, 4.1–4.6] Although Section 3.1 motivates a probabilistic model and Figure 3 shows overlapping CFP distributions for A100 and Xeon 8380, all subsequent trend analysis (Figures 4–6) uses only the mean CFP with no uncertainty band or propagation. The paper does not demonstrate whether its qualitative conclusions—such as V100 achieving roughly 2× performance/CFP over A100, or total CFP exceeding 50× the baseline—are preserved under the range of CFP values implied by its own Monte Carlo model. At a minimum, the final trends should report confidence or credible intervals, and the 50× statement should be given as a range rather than a point value.
minor comments (5)
  1. [6] The conclusion repeatedly writes 'CarboSet' instead of 'CarbonSet'; this typo should be corrected.
  2. [Figures 4–6] Several figure labels contain artifacts such as 'T otal CFP' and 'CFP Percentage'; these should be fixed for readability.
  3. [Figure 9 caption] The caption writes 'chiple CPUs'; this should be 'chiplet CPUs'.
  4. [3.2] The sentence introducing chiplet CPUs notes a uniform process node and equal die-area distribution, but the paper later treats this as an assumption for all AMD chiplet processors without checking vendor disclosures; this limitation should be reiterated where the chiplet case study is presented.
  5. [3.2] The performance metric choices are reasonable, but the text should explicitly explain why Passmark and Geekbench scores are treated as comparable within each category, since the two are not normalized to a common baseline.

Circularity Check

0 steps flagged · score 0.0 of 10

No circular derivation found: CFP values are computed from explicit external-input equations, and the 50x total-CFP claim is an output of a stated shipment reconstruction rather than a fitted target.

full rationale

The paper's derivation chain is self-contained in the relevant sense. Total CFP is computed from the ECO-CHIP equations (Eqs. 1-2) with input distributions sourced externally (TSMC defect/EPA reports, IMEC GPA, Our World in Data carbon intensity, Geekbench/PassMark performance data); the Monte Carlo procedure averages over these distributions and does not tune parameters to reproduce any headline result. The abstract's 50x total-CO2 claim is computed from NVIDIA datacenter revenue divided by an assumed flagship-ASP with a 75% margin, multiplied by modeled per-chip CFP (Sec. 4.3, Fig. 6); it is an output of an explicit assumption chain, not a fitted parameter, so it does not reduce to its inputs by construction. The ECO-CHIP framework is a self-citation (ref [23]) and is load-bearing as the model behind all CFP values, but the model equations are stated in the paper and its inputs are external, so the citation functions as provenance for an executable model rather than as an authority invoked to force the conclusion. Two limitations are worth flagging but are not circularity: the H100 5nm node is 'scaled based on existing process node metrics' rather than modeled (footnote after Sec. 4.3), and the shipment reconstruction assumes all datacenter revenue comes solely from latest flagship GPU sales at MSRP; these affect accuracy and uncertainty but do not make the derivation equivalent to its inputs. No step meets the quoted-evidence bar for self-definition, fitted-input-as-prediction, or self-citation-forcing.

Assumptions & free parameters 8 free parameters · 6 assumptions · 0 invented entities

The central analysis rests on the ECO-CHIP lifecycle model, a small number of externally sourced input distributions, fixed operational assumptions, and a stylized shipment reconstruction. None of these are independently validated against measured chip footprints in this preprint.

free parameters (8)
  • Defect density D0 distribution = KDE from TSMC 10nm defect reports
    Input to yield equation (Eq. 1); affects ECFP for every processor. Derived from external data but not validated against measured chip CFP.
  • Energy per unit area (EPA) distribution = KDE from TSMC 10nm reports
    Input to CFPA (Eq. 2); affects manufacturing CFP for every processor.
  • Carbon intensity distribution = KDE from global electricity trends 2000-2024
    Scales both manufacturing CFPA and operational CFP, so it affects all reported totals.
  • Gas per unit area (GPA) distribution = Gaussian from IMEC fab emissions data
    Input to CFPA (Eq. 2); contributes to manufacturing embodied carbon.
  • Fixed processor lifetime = 3 years
    Assumed for OCFP for all processors; OCFP dominates total CFP, so this strongly scales all totals.
  • Fixed idle time = 60%
    Assumed for OCFP; combined with lifetime determines operational energy and dominates CFP magnitude.
  • NVIDIA profit margin assumption = 75%
    Used in Section 4.3 to convert revenue to shipped GPU units; the headline 50x total-CFP multiplier depends on this.
  • Alpha clustering parameter = not stated in text
    Yield equation (Eq. 1) uses alpha, but the paper does not give its value or source; this affects ECFP across all chips.
assumptions (6)
  • domain assumption ECO-CHIP model correctly estimates lifecycle CFP as ECFP plus OCFP with manufacturing CFPA per Eq. 2
    Central metric comes from the authors' prior ECO-CHIP framework (ref [23]); no external validation against measured chip emissions is provided in this preprint.
  • ad hoc to paper NVIDIA datacenter revenue consists solely of latest flagship GPU sales at highest list price
    Section 4.3 explicitly assumes this; the 50x total-CFP finding depends on it.
  • ad hoc to paper H100 5nm process node CFP can be scaled from existing process node metrics
    Footnote in Section 4.3 states 5nm is 'actually not modeled in ECO-CHIP, but scaled based on existing process node metrics'; the scaling method is not given.
  • ad hoc to paper Chiplet CPUs have equal die area distribution and a uniform process node
    Section 3.2 states users can modify these assumptions; the chiplet sustainability case study in Section 4.6 uses them.
  • domain assumption TDP approximates operational power draw
    OCFP is computed from TDP and a fixed 60% idle time; real power depends on workload and DVFS.
  • domain assumption Cross-benchmark comparability: Geekbench, PassMark, and OpenCL scores are valid performance measures within each series
    Section 3.2 explains SPEC version issues and chooses different benchmarks for desktop and datacenter CPUs and OpenCL for GPUs; comparability across generations is assumed.

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Cite this review

Pith. "Pith review of CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs." pith.science (2026). https://pith.science/paper/XEYSIZZB

@misc{pith2026250610373,
  author       = {Pith},
  title        = {Pith review of: CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/XEYSIZZB}},
  note         = {Machine review of arXiv:2506.10373}
}
abstract

Over the years, the chip industry has consistently developed high-performance processors to address the increasing demands across diverse applications. However, the rapid expansion of chip production has significantly increased carbon emissions, raising critical concerns about environmental sustainability. While researchers have previously modeled the carbon footprint (CFP) at both system and processor levels, a holistic analysis of sustainability trends encompassing the entire chip lifecycle remains lacking. This paper presents CarbonSet, a comprehensive dataset integrating sustainability and performance metrics for CPUs and GPUs over the past decade. CarbonSet aims to benchmark and assess the design of next-generation processors. Leveraging this dataset, we conducted detailed analysis of flagship processors' sustainability trends over the last decade. This paper further highlights that modern processors are not yet sustainably designed, with total carbon emissions increasing more than 50$\times$ in the past three years due to the surging demand driven by the AI boom. Power efficiency remains a significant concern, while advanced process nodes pose new challenges requiring to effectively amortize the dramatically increased manufacturing carbon emissions.

Figures

Figures reproduced from arXiv: 2506.10373 by the authors.

Figure 1
Figure 1. CarbonSet contains sustainability-related metrics [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Distributions for (a) Defect density(10nm) [ [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. CFP distributions for two flagship processors from our dataset obtained from enhanced ECO-CHIP, by varying defect [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figures from the paper (5 more)
Figure 4
Figure 4. Figure 4: Sustainability trends in flagship desktop (top) and datacenter (bottom) GPUs from NVIDIA [PITH_FULL_IMAGE:figures/full_fig_p005_4.png]
Figure 5
Figure 5. Figure 5: Sustainability trends in flagship desktop (top) and datacenter (bottom) CPUs from Intel [PITH_FULL_IMAGE:figures/full_fig_p006_5.png]
Figure 7
Figure 7. Figure 7: Manufacturing cost or selling price are not proper [PITH_FULL_IMAGE:figures/full_fig_p006_7.png]
Figure 8
Figure 8. Figure 8: Ratio of ECFP to OCFP for NVIDIA A100-SXM across [PITH_FULL_IMAGE:figures/full_fig_p007_8.png]
Figure 9
Figure 9. Figure 9: Manufacturing CFP of AMD flagship chiple CPUs [PITH_FULL_IMAGE:figures/full_fig_p007_9.png]

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Reference graph

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