pith. sign in

arxiv: 2511.04687 · v2 · submitted 2025-10-24 · 💻 cs.AR

Eliminating the Hidden Cost of Zone Management in ZNS SSDs

Teona Bagashvili , Tarikul Islam Papon , Subhadeep Sarkar , Manos Athanassoulis This is my paper

Pith reviewed 2026-05-18 04:15 UTC · model grok-4.3

classification 💻 cs.AR
keywords ZNS SSDzone managementdevice-level write amplificationwear levelingstorage performanceSilentZNSflash memorykey-value storage
0
0 comments X

The pith

SilentZNS eliminates hidden device-level write amplification in ZNS SSDs by allocating blocks to zones dynamically instead of using fixed mappings.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper identifies four root causes of excess writes and interference in existing ZNS controllers: zone allocation granularity, geometry, write order, and mapping strategy. SilentZNS replaces rigid logical-to-physical mappings with on-the-fly assignment of arbitrary block collections to zones while preserving parallelism and wear leveling. This change removes superfluous writes that would otherwise occur inside the device. A reader would care because the result is lower overall wear, more predictable latency, and faster execution for host-managed applications such as key-value stores.

Core claim

SilentZNS is a holistic zone management scheme that expands the design space of zones by allocating blocks to zones on the fly, departing from traditional logical-to-physical zone mapping to allow arbitrary collections of blocks to be assigned to a zone. It guarantees wear-leveling and competitive read performance while substantially reducing device-level write amplification.

What carries the argument

SilentZNS, a flexible zone allocation scheme that expands the design space of zones and assigns arbitrary blocks to zones dynamically rather than relying on fixed logical-to-physical mappings.

If this is right

  • Device-level write amplification drops by 92% at 10% zone occupancy.
  • Overall device wear decreases by up to 12%.
  • Workload execution becomes up to 3.7 times faster.
  • Host I/O interference is reduced while parallelism and read performance remain competitive.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Host software could rely on simpler zone-usage policies without needing to tune for specific controller geometries.
  • The same on-the-fly allocation idea could be tested on other append-only storage abstractions beyond ZNS.
  • Controller firmware adopting dynamic block-to-zone assignment might support higher sustained occupancy without the previous wear penalty.

Load-bearing premise

The ConfZNS++ emulator faithfully reproduces zone geometry, mapping behavior, and internal write amplification of real ZNS SSD controllers across the tested occupancy levels and workloads.

What would settle it

Running the same synthetic microbenchmarks and key-value workloads on physical ZNS hardware at 10% zone occupancy and checking whether device-level write amplification drops by approximately 92%.

Figures

Figures reproduced from arXiv: 2511.04687 by Manos Athanassoulis, Subhadeep Sarkar, Tarikul Islam Papon, Teona Bagashvili.

Figure 1
Figure 1. Figure 1: SilentZNS allows a ZNS SSD to offer reduced DLWA [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: (a) SilentZNS constructs a zone from erase block as chunk size is 1 ( [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: (a) SilentZNS’s DLWA benefits are highest at low zone occupancy. (b) A higher [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: (a) SilentZNS maintains stable throughput with concurrent [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
read the original abstract

Zoned Namespace (ZNS) SSDs offer a new storage model that allows for high throughput and low-latency storage by eliminating device-side garbage collection. The ZNS interface exposes storage as append-only zones, thus enforcing host applications (e.g., database systems) to append, read, and garbage collect their pages. However, the storage abstraction of ZNS SSD hides the substantial differences across different ZNS SSD controller designs, which affects both the performance and predictability of host applications. We find that existing ZNS controllers exhibit (a) increased device-level write amplification (DLWA), (b) increased wear, and (c) increased interference with host I/O. We identify that (i) zone allocation granularity, (ii) zone geometry, (iii) write order, and (iv) zone mapping and management strategy are the four main causes behind this. To provide a predictable storage device, we propose SilentZNS, a new holistic zone management approach that expands the design space of zones and allocates blocks to zones on the fly, while minimizing wear, maintaining parallelism, and avoiding superfluous writes to the device. SilentZNS is a flexible zone allocation scheme that departs from traditional logical-to-physical zone mapping and allows arbitrary collections of blocks to be assigned to a zone. SilentZNS further guarantees wear-leveling and competitive read performance, while substantially reducing DLWA. We implement SilentZNS using the state-of-the-art ConfZNS++ emulator and evaluate it on synthetic microbenchmarks and key-value storage engines. We show that SilentZNS reduces superfluous writes, leading to lower DLWA (92% less at 10% zone occupancy), less overall wear (up to 12%), and up to 3.7x faster workload execution.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper identifies four causes of hidden costs in ZNS SSD controllers (zone allocation granularity, zone geometry, write order, and zone mapping/management strategy) that increase device-level write amplification (DLWA), wear, and host I/O interference. It proposes SilentZNS, a flexible zone allocation scheme that assigns arbitrary collections of blocks to zones on the fly while guaranteeing wear-leveling and competitive read performance. Implemented in the ConfZNS++ emulator and evaluated on synthetic microbenchmarks plus key-value engines, SilentZNS is reported to cut DLWA by 92% at 10% zone occupancy, reduce wear by up to 12%, and speed up workloads by up to 3.7×.

Significance. If the quantitative gains hold beyond the emulator, SilentZNS would meaningfully improve predictability and endurance for host-managed ZNS workloads such as databases and KV stores by eliminating superfluous writes without sacrificing parallelism or wear-leveling. The work directly addresses a practical gap between the ZNS interface abstraction and real controller behavior.

major comments (2)
  1. [Evaluation] Evaluation section (and abstract claims): All reported gains (92% DLWA reduction at 10% occupancy, 12% wear reduction, 3.7× speedup) are obtained exclusively from the ConfZNS++ emulator. No cross-validation against physical ZNS SSDs is described, yet the central claims rest on the emulator faithfully reproducing zone geometry, internal mapping, and DLWA behavior across occupancy levels. If the emulator understates baseline DLWA or overstates SilentZNS gains, the reductions do not transfer to real devices.
  2. [Evaluation] Methods / experimental setup: The abstract and results present point estimates (92% DLWA reduction, up to 12% wear, 3.7× speedup) without error bars, workload trace details, or ablation data on the four identified causes. This makes it impossible to assess whether post-hoc parameter choices or emulator-specific artifacts drive the numbers.
minor comments (2)
  1. [Introduction / Background] The four causes are listed in the abstract and introduction but would benefit from a dedicated background subsection with concrete controller examples or diagrams to clarify how each contributes to DLWA.
  2. [Abstract] Notation for DLWA and zone occupancy should be defined once and used consistently; the abstract uses “DLWA” and “zone occupancy” without prior definition.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive feedback on our evaluation methodology. We address each major comment below, acknowledging limitations where appropriate and outlining planned revisions to improve clarity and robustness.

read point-by-point responses

  1. Referee: [Evaluation] Evaluation section (and abstract claims): All reported gains (92% DLWA reduction at 10% occupancy, 12% wear reduction, 3.7× speedup) are obtained exclusively from the ConfZNS++ emulator. No cross-validation against physical ZNS SSDs is described, yet the central claims rest on the emulator faithfully reproducing zone geometry, internal mapping, and DLWA behavior across occupancy levels. If the emulator understates baseline DLWA or overstates SilentZNS gains, the reductions do not transfer to real devices.

    Authors: We agree that the absence of direct cross-validation with physical ZNS SSDs represents a limitation in the current manuscript. ConfZNS++ is a state-of-the-art emulator explicitly designed to model ZNS controller internals, including zone geometry, allocation granularity, and device-level write amplification, and it has been validated against hardware characteristics in prior literature. However, practical constraints such as restricted access to proprietary controller firmware and the difficulty of instrumenting physical devices for DLWA measurement make full hardware replication challenging. In the revised version, we will add a dedicated subsection discussing the emulator's modeling fidelity, its alignment with publicly documented ZNS SSD behaviors, and explicit limitations on generalizability to real hardware. revision: yes

  2. Referee: [Evaluation] Methods / experimental setup: The abstract and results present point estimates (92% DLWA reduction, up to 12% wear, 3.7× speedup) without error bars, workload trace details, or ablation data on the four identified causes. This makes it impossible to assess whether post-hoc parameter choices or emulator-specific artifacts drive the numbers.

    Authors: We acknowledge that the current presentation relies on point estimates and lacks sufficient statistical detail and decomposition of results. In the revised manuscript, we will incorporate error bars derived from repeated experimental runs, expand the description of workload traces (including their generation parameters and representativeness), and add an ablation study that quantifies the individual contributions of the four identified causes—zone allocation granularity, zone geometry, write order, and zone mapping/management strategy—to the observed reductions in DLWA, wear, and latency. These additions will allow readers to better evaluate the robustness of the findings. revision: yes

Circularity Check

0 steps flagged

No significant circularity in experimental evaluation chain

full rationale

The paper presents SilentZNS as a new zone management scheme implemented in the ConfZNS++ emulator and evaluated via synthetic microbenchmarks plus key-value workloads. All quantitative claims (DLWA reduction, wear reduction, execution speedup) are reported as direct empirical outcomes of that implementation rather than as predictions derived from equations, fitted parameters, or self-referential definitions inside the paper. No mathematical derivation chain exists that could reduce to its own inputs by construction, and the provided text contains no self-citations used as load-bearing uniqueness theorems or ansatzes. The evaluation is therefore self-contained against the emulator as an external benchmark.

Axiom & Free-Parameter Ledger

0 free parameters · 1 axioms · 0 invented entities

The paper rests on the domain assumption that the four listed controller-design factors are the dominant sources of hidden cost and that the emulator accurately captures their effects; no free parameters or new invented entities are introduced in the abstract.

axioms (1)
  • domain assumption Zone allocation granularity, zone geometry, write order, and zone mapping strategy are the four main causes of increased DLWA, wear, and host I/O interference in existing ZNS controllers.
    This premise is used to motivate the need for a new allocation strategy.

pith-pipeline@v0.9.0 · 5865 in / 1320 out tokens · 49656 ms · 2026-05-18T04:15:39.351995+00:00 · methodology

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Reference graph

Works this paper leans on

15 extracted references · 15 canonical work pages

  1. [1]

    Matias Bjørling et al. 2021. ZNS: Avoiding the Block Interface Tax for Flash-based SSDs.ATC(2021)

    work page 2021

  2. [2]

    Yu Cai et al. 2015. Read Disturb Errors in MLC NAND Flash Memory: Charac- terization, Mitigation, and Recovery.DSN(2015)

    work page 2015

  3. [3]

    Michael Cornwell. 2012. Anatomy of a Solid-State Drive.CACM55, 12 (2012)

    work page 2012

  4. [4]

    Western Digital. 2025. Zoned Storage.https://zonedstorage.io/docs/introduction (2025)

    work page 2025

  5. [5]

    Krijn Doekemeijer et al. 2023. Performance Characterization of NVMe Flash Devices with Zoned Namespaces (ZNS).CLUSTER(2023)

    work page 2023

  6. [6]

    Krijn Doekemeijer et al. 2024. Exploring I/O Management Performance in ZNS with ConfZNS++.SYSTOR(2024)

    work page 2024

  7. [7]

    Fio. 2021. Flexible I/O tester.https://fio.readthedocs.io/en/latest/(2021)

    work page 2021

  8. [8]

    Biyong Liu et al . 2023. LifetimeKV: Narrowing the lifetime gap of SSTs in LSMT-based KV stores for ZNS SSDs.ICCD(2023)

    work page 2023

  9. [9]

    Renping Liu et al. 2024. GAP: A Global Wear-Aware Block Pool for Enhancing Lifetime of ZNS SSDs.NVMSA(2024)

    work page 2024

  10. [10]

    Linbo Long et al. 2024. WA-Zone: Wear-Aware Zone Management Optimization for LSM-Tree on ZNS SSDs.TACO21, 1 (2024)

    work page 2024

  11. [11]

    Mingchen Lu et al. 2023. ZoneKV: A Space-Efficient Key-Value Store for ZNS SSDs.60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023(2023)

    work page 2023

  12. [12]

    Tarikul Islam Papon. 2024. Enhancing Data Systems Performance by Exploiting SSD Concurrency & Asymmetry.ICDE(2024)

    work page 2024

  13. [13]

    Tarikul Islam Papon and Manos Athanassoulis. 2021. A Parametric I/O Model for Modern Storage Devices.DAMON(2021)

    work page 2021

  14. [14]

    Inho Song et al. 2023. ConfZNS : A Novel Emulator for Exploring Design Space of ZNS SSDs.SYSTOR(2023)

    work page 2023

  15. [15]

    Zichen Zhu et al. 2024. KVBench: A Key-Value Benchmarking Suite.DBTest (2024)

    work page 2024