Paper Citation Record · LEDGER

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation

As of 22 July 2026, this Paper Citation Record lists 37 of 37 outbound references and 0 inbound Pith citation observations for arXiv:2512.03053.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2512.03053 v2

Coverage vector

measured 37 of 37 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-05-17T05:24:05.830241Z

measured 37 of 37 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-07-22T06:31:00.163083+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

37 of 37 outbound references displayed

verified exact15
verified fuzzy20
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch2

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 0e8662d6-7aa2-46a3-875e-5340d343ebd6 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:05.989540Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 886cd8e2-f4df-45b4-abca-14878dc3af5d · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 2

Resolution: verified exact; doi, observed 2026-05-17T05:29:04.736941Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 97956114-8a24-4cf2-8336-6a19af0bf77d · outbound

This paper cites Small Language Models are the Future of Agentic AI.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Small Language Models are the Future of Agentic AI

Reference 3

Resolution: verified exact; local_arxiv, observed 2026-05-17T05:29:05.121707Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation ac5ffe7f-6fa8-421c-89ae-9a326f5069c4 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:05.986132Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation eb413e8b-eb44-4e99-9a71-659921d87e40 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 5

Resolution: verified exact; doi, observed 2026-05-17T05:29:04.727264Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation f542bc07-2733-46a0-a9bd-5283cddce09d · outbound

This paper cites VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation VerilogDB: The Largest, Highest-Quality Dataset with a Preprocessing Framework for LLM-based RTL Generation

Reference 6

Resolution: metadata mismatch; arxiv_id, observed 2026-05-17T05:29:05.111153Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a323b583-22bf-43e5-9698-4113fdc056b5 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.740473Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation d36df803-95d3-421a-b69a-3e392b773936 · outbound

This paper cites Evaluating Large Language Models Trained on Code.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Evaluating Large Language Models Trained on Code

Reference 8

Resolution: verified exact; local_arxiv, observed 2026-05-17T05:29:05.114327Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 9bb6c245-ea18-4792-9bb3-5d4c51ad249e · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.732473Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a529bcd7-92a9-4507-b7d0-d067eb575c35 · outbound

This paper cites AbsenceBench: Language Models Can't Tell What's Missing.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation AbsenceBench: Language Models Can't Tell What's Missing

Reference 10

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.107544Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a01c5d4c-b49f-4788-83bd-d727f645bd83 · outbound

This paper cites AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMs.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMs

Reference 11

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.089638Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation ebb64ce1-e270-4e36-a779-e08bf7a0c947 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.735114Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 5ad2458e-be37-4e3c-8afc-356fb876b477 · outbound

This paper cites The Llama 3 Herd of Models.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation The Llama 3 Herd of Models

Reference 13

Resolution: verified exact; local_arxiv, observed 2026-05-17T05:29:05.086238Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation d1b48465-a6ae-4022-8c1b-143a8ee5fb7b · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.737832Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a52363ab-1fc2-435b-a2b7-dce35559f29e · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.761161Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 8703b735-d3b3-4a04-8bb7-60e9a41ad111 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.768277Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 2ff2a1d1-a154-4f9f-8650-79eded9d036c · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.727431Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 05c39980-3242-49ee-accc-967701fd9145 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.724220Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 7ace3bf0-e544-418b-b39a-4e73a7e97799 · outbound

This paper cites High- Performance ARM-on-ARM Virtualization for Mul- ticore SystemC-TLM-Based Virtual Platforms.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation High- Performance ARM-on-ARM Virtualization for Mul- ticore SystemC-TLM-Based Virtual Platforms

Reference 19

Resolution: metadata mismatch; arxiv_id, observed 2026-05-17T05:29:04.731411Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 583b370e-2adf-47d0-b406-660ca291ca98 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.730140Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation cf155a17-e004-47bf-a609-fe05232744b4 · outbound

This paper cites arXiv preprint arXiv:2510.15511 , year=.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation arXiv preprint arXiv:2510.15511 , year=

Reference 21

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.093445Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a55e88bf-fcfd-4445-9159-93323fa4298a · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.771832Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 966e74cc-1193-48c8-ae5f-2a6f76e8a27d · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:31:34.764668Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 070dbe26-0e03-41ef-bf26-b1e3584d6609 · outbound

This paper cites Unveiling the Secret Recipe: A Guide For Supervised Fine-Tuning Small LLMs.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unveiling the Secret Recipe: A Guide For Supervised Fine-Tuning Small LLMs

Reference 24

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.118255Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 09ce4eaa-9dc0-4d6e-bdaa-93b0762077da · outbound

This paper cites Pilz, Yusuf Mahmood, and Lennart Heim.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Pilz, Yusuf Mahmood, and Lennart Heim

Reference 25

Resolution: verified exact; doi, observed 2026-05-17T05:29:04.733918Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation bf08b891-b83f-49ba-a840-82d947017ed1 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:06.009199Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation a1419b8a-6cd1-40ca-8ddb-0fa242f7787f · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:06.005672Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 66fd0409-1fb6-4a57-9330-801c3956097f · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:06.001759Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 8cf2b6df-82b9-4c31-98fc-d862fd70ad1a · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:05.998859Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 9d37ec36-0107-42ac-9450-0ff23e573641 · outbound

This paper cites Veritas: Deterministic Verilog Code Synthesis from LLM-Generated Conjunctive Normal Form.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Veritas: Deterministic Verilog Code Synthesis from LLM-Generated Conjunctive Normal Form

Reference 30

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.100307Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation d1e3f49e-500a-4b91-84d8-4cc636301a15 · outbound

This paper cites VeriGen: A Large Language Model for Verilog Code Generation.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation VeriGen: A Large Language Model for Verilog Code Generation

Reference 31

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.078923Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 179b6751-a77a-4c7b-a00f-a926a2532668 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 32

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:06.012565Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation ec1f6389-9c15-494d-afeb-b5c6cb3fc877 · outbound

This paper cites an unresolved cited work.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Unresolved cited work

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:05.995575Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation b7f6bfa1-fd8c-4a01-b264-6d9c31a08a40 · outbound

This paper cites VeriCoder: Enhancing LLM-Based RTL Code Generation through Functional Correctness Validation.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation VeriCoder: Enhancing LLM-Based RTL Code Generation through Functional Correctness Validation

Reference 34

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.082595Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation daef642b-9d87-4cd4-8f54-ddfea59c90fb · outbound

This paper cites 2010.Tractatus Logico-Philosophicus.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation 2010.Tractatus Logico-Philosophicus

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-05-17T05:29:05.992499Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 15656c57-47a9-4dd6-874f-624596abe383 · outbound

This paper cites Hallucination is Inevitable: An Innate Limitation of Large Language Models.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation Hallucination is Inevitable: An Innate Limitation of Large Language Models

Reference 36

Resolution: verified exact; local_arxiv, observed 2026-05-17T05:29:05.096590Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Observation 3b421b10-a84c-46b8-a9d8-30b342218a20 · outbound

This paper cites CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarization.

Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation CodeV: Empowering LLMs with HDL Generation through Multi-Level Summarization

Reference 37

Resolution: verified exact; arxiv_id, observed 2026-05-17T05:29:05.103851Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-07-22T06:31:00.163083+00:00.

Pith citing papers

No inbound Pith citation observations are available.