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arxiv: 2602.08800 · v2 · submitted 2026-02-09 · 💻 cs.OS · cs.DC

Equilibria: Fair Multi-Tenant CXL Memory Tiering At Scale

Kaiyang Zhao , Neha Gholkar , Hasan Maruf , Abhishek Dhanotia , Johannes Weiner , Gregory Price , Ning Sun , Bhavya Dwivedi
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Stuart Clark Dimitrios Skarlatos
This is my paper

Pith reviewed 2026-05-16 03:46 UTC · model grok-4.3

classification 💻 cs.OS cs.DC
keywords CXL memory tieringmulti-tenancyfairness policiesthrashing suppressionOS frameworkdatacenter scaleSLO complianceLinux kernel
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The pith

Equilibria is an OS framework that enforces user-specified fairness policies in multi-tenant CXL memory tiering through regulated promotion and demotion while suppressing thrashing.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Memory expansion via CXL reduces datacenter cost and power but existing tiering solutions lack support for stacked workloads, flexible fairness controls, and scale observability. Equilibria supplies per-container fair-share allocation, fine-grained usage tracking, and regulated promotion and demotion to enforce arbitrary user policies. It adds thrashing suppression to limit noisy-neighbor interference. In large hyperscaler deployments with production workloads, the system helps tenants meet SLOs and raises performance up to 52 percent over the current Linux TPP baseline and 1.7 times on benchmarks. All changes have been contributed back to the Linux kernel.

Core claim

Equilibria is an OS framework for fair multi-tenant CXL tiering at datacenter scale. It provides per-container controls for memory fair-share allocation together with fine-grained observability of tiered-memory usage and operations. The framework enforces flexible, user-specified fairness policies through regulated promotion and demotion and mitigates interference by suppressing thrashing. In a large hyperscaler fleet, Equilibria improves performance over the state-of-the-art Linux solution TPP by up to 52 percent for production workloads and 1.7 times for benchmarks while helping workloads meet SLOs.

What carries the argument

Regulated promotion and demotion combined with thrashing suppression to enforce per-container fairness policies.

If this is right

  • Workloads meet SLOs while avoiding performance interference from co-located tenants.
  • Operators gain per-container visibility into tiered-memory usage and operations at fleet scale.
  • User-specified fairness policies can be applied flexibly without rewriting application code.
  • Performance improves by up to 52 percent on production workloads and 1.7 times on benchmarks relative to TPP.
  • All changes are released as Linux kernel patches, enabling immediate adoption.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The same regulated-tiering approach could be applied to other heterogeneous memory technologies beyond CXL.
  • Operators could combine Equilibria controls with higher-level cluster schedulers to optimize aggregate datacenter efficiency.
  • Fine-grained observability data might be fed into automated anomaly detection systems for earlier diagnosis of tiering pathologies.
  • Thrashing suppression may become a standard kernel primitive for any tiered-memory subsystem.

Load-bearing premise

Regulated promotion and demotion plus thrashing suppression can enforce arbitrary user-specified fairness policies at scale without unacceptable overhead or new interference modes.

What would settle it

A production multi-tenant deployment in which enforcing a chosen fairness policy produces either SLO violations or overhead that exceeds the gains measured against TPP.

Figures

Figures reproduced from arXiv: 2602.08800 by Abhishek Dhanotia, Bhavya Dwivedi, Dimitrios Skarlatos, Gregory Price, Hasan Maruf, Johannes Weiner, Kaiyang Zhao, Neha Gholkar, Ning Sun, Stuart Clark.

Figure 1
Figure 1. Figure 1: Memory as a % of rack TCO and power at Meta’s datacenters. [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Latency versus bandwidth for local, remote, and CXL memory. [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Container A with hotter access patterns gets all of its footprint in [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Equilibria Overview. single workload offline, without enumerating all possible com￾binations of colocated workloads. Second, the other potentially contended resource—CXL memory bandwidth—is shown in Section III to be not under contention for memory-capacity￾bound workloads, and not having to specify more parameters for tiering simplifies job configurations. The fair share of memory is subjective and depend… view at source ↗
Figure 5
Figure 5. Figure 5: Memory usage when containers exceed local memory lower protection. [PITH_FULL_IMAGE:figures/full_fig_p008_5.png] view at source ↗
Figure 7
Figure 7. Figure 7: Memory placement of TaoBench and SparkBench (Container A) on [PITH_FULL_IMAGE:figures/full_fig_p009_7.png] view at source ↗
Figure 8
Figure 8. Figure 8: Memory usage on Equilibria of four CI instances. [PITH_FULL_IMAGE:figures/full_fig_p010_8.png] view at source ↗
Figure 9
Figure 9. Figure 9: Memory usage on Equilibria of five instances of Web. [PITH_FULL_IMAGE:figures/full_fig_p011_9.png] view at source ↗
read the original abstract

Memory dominates datacenter system cost and power. Memory expansion via Compute Express Link (CXL) is an effective way to provide additional memory at lower cost and power, but its effective use requires software-level tiering for hyperscaler workloads. Existing tiering solutions, including current Linux support, face fundamental limitations in production deployments. First, they lack multi-tenancy support, failing to handle stacked homogeneous or heterogeneous workloads. Second, limited control-plane flexibility leads to fairness violations and performance variability. Finally, insufficient observability prevents operators from diagnosing performance pathologies at scale. We present Equilibria, an OS framework enabling fair, multi-tenant CXL tiering at datacenter scale. Equilibria provides per-container controls for memory fair-share allocation and fine-grained observability of tiered-memory usage and operations. It further enforces flexible, user-specified fairness policies through regulated promotion and demotion, and mitigates noisy-neighbor interference by suppressing thrashing. Evaluated in a large hyperscaler fleet using production workloads and benchmarks, Equilibria helps workloads meet service level objectives (SLOs) while avoiding performance interference. It improves performance over the state-of-the-art Linux solution, TPP, by up to 52% for production workloads and 1.7x for benchmarks. All Equilibria patches have been released to the Linux community.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper presents Equilibria, an OS framework for fair multi-tenant CXL memory tiering at datacenter scale. It adds per-container controls for memory fair-share allocation, fine-grained observability of tiered usage, enforcement of user-specified fairness policies via regulated promotion and demotion, and thrashing suppression to reduce noisy-neighbor interference. Fleet evaluation with production workloads and benchmarks shows up to 52% improvement over Linux TPP for production workloads and 1.7x for benchmarks, while helping meet SLOs and avoiding interference; all patches are released to the Linux community.

Significance. If the results hold, the work is significant for hyperscale memory management as CXL adoption grows. It directly addresses multi-tenancy and fairness gaps in existing tiering solutions like TPP, with production-fleet evidence and open patches providing a strong reproducibility signal that could influence Linux kernel development.

major comments (2)
  1. [§3] §3 (Design): The translation of arbitrary user-specified fairness policies into concrete promotion/demotion decisions is described at a high level but lacks pseudocode, state-machine details, or invariants, which is load-bearing for the central claim that regulated tiering can enforce policies at scale without new interference modes.
  2. [§5] §5 (Evaluation): No quantitative results are reported for fairness violation rates, control-plane overhead, or thrashing-suppression effectiveness across heterogeneous workloads, despite these being identified as key limitations of prior systems; this weakens the SLO-compliance and interference-avoidance claims.
minor comments (2)
  1. [Figure 4] Figure 4 and Table 2: Axis labels and workload identifiers are inconsistent between production traces and benchmarks, making direct comparison harder.
  2. [§2] §2 (Related Work): The discussion of TPP could include a brief citation to the specific Linux commit or paper section describing its promotion heuristic for easier comparison.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the positive assessment and recommendation for minor revision. The comments highlight opportunities to strengthen the design exposition and evaluation rigor. We address each major comment below and commit to revisions accordingly.

read point-by-point responses

  1. Referee: [§3] §3 (Design): The translation of arbitrary user-specified fairness policies into concrete promotion/demotion decisions is described at a high level but lacks pseudocode, state-machine details, or invariants, which is load-bearing for the central claim that regulated tiering can enforce policies at scale without new interference modes.

    Authors: We agree that §3 would benefit from greater concreteness on the policy-to-action translation. In the revised manuscript we will add (1) pseudocode for the core decision loop that maps user-specified fair-share targets and priority weights into promotion/demotion rates, (2) a state-machine description of the per-container controller (idle, promoting, demoting, throttled), and (3) the key invariants (bounded rate changes per epoch, hysteresis to prevent oscillation, and aggregate memory-pressure caps) that guarantee no new interference modes are introduced. These additions will be placed in §3.3 and will be accompanied by a short proof sketch of stability under the stated invariants. revision: yes

  2. Referee: [§5] §5 (Evaluation): No quantitative results are reported for fairness violation rates, control-plane overhead, or thrashing-suppression effectiveness across heterogeneous workloads, despite these being identified as key limitations of prior systems; this weakens the SLO-compliance and interference-avoidance claims.

    Authors: We acknowledge that the initial submission did not report the three requested quantitative metrics. The existing results demonstrate end-to-end SLO compliance and interference reduction via performance gains, but direct measurements will make the claims stronger. In the revision we will add to §5: (a) fairness-violation rate (fraction of time a container exceeds its fair share by >10 %), (b) control-plane overhead (additional CPU cycles per 100 ms epoch for policy enforcement), and (c) thrashing-suppression effectiveness (reduction in promotion/demotion events per second under noisy-neighbor injection). All three will be reported across the heterogeneous production workloads and benchmark mixes already evaluated. revision: yes

Circularity Check

0 steps flagged

No significant circularity detected

full rationale

The paper describes an engineering OS framework for multi-tenant CXL memory tiering with per-container controls, regulated promotion/demotion, and thrashing suppression. It contains no mathematical derivations, equations, fitted parameters, or ansatzes. All performance and fairness claims are supported by direct empirical evaluation against the external baseline TPP on production workloads and benchmarks in a hyperscaler fleet, with released patches providing independent reproducibility. No self-citation chains or self-definitional reductions appear in the load-bearing steps; the work is self-contained as an implementation evaluated on external traces.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

No free parameters, axioms, or invented entities; the framework relies on standard OS memory management primitives and CXL hardware interfaces already present in the Linux kernel.

pith-pipeline@v0.9.0 · 5577 in / 1055 out tokens · 91171 ms · 2026-05-16T03:46:21.935633+00:00 · methodology

discussion (0)

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