AnTi-MiCS: Analytical Framework for Bounding Time in Embedded Mixed-Criticality Systems

Akash Kumar; Behnaz Ranjbar

arxiv: 2604.27862 · v1 · submitted 2026-04-30 · 💻 cs.DC

AnTi-MiCS: Analytical Framework for Bounding Time in Embedded Mixed-Criticality Systems

Behnaz Ranjbar , Akash Kumar This is my paper

Pith reviewed 2026-05-07 05:57 UTC · model grok-4.3

classification 💻 cs.DC

keywords mixed-criticality systemsworst-case execution timequality of serviceutilization wasteembedded real-time systemsanalytical frameworktemporal correlationmode switch

0 comments

The pith

Design-time analysis of task executions determines suitable low WCETs to raise QoS and cut waste in mixed-criticality embedded systems.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Mixed-criticality systems must schedule tasks with different safety levels on shared hardware, using conservative high WCET bounds that leave processors idle much of the time. The paper shows how to replace overly low WCET guesses with analytically chosen values derived from observed execution traces at design time. When execution times vary widely, the extension computes several such low bounds by tracking how input patterns correlate over time. A reader should care because the resulting schedule keeps high-criticality tasks safe yet allows far more low-criticality work to finish, directly raising responsiveness in real embedded platforms.

Core claim

AnTi-MiCS supplies an analytical method that inspects task execution traces collected at design time to select appropriate low WCET values for lower-criticality modes. When a single low WCET cannot capture large variations such as bimodal distributions, MulTi-MiCS computes multiple low WCETs by exploiting temporal correlations between successive inputs. Both methods keep the high WCET as the safe upper bound for mode-switch analysis while allowing more tasks to run in low mode, yielding 30.27 percent average QoS gain and 35.89 percent less utilization waste versus prior schemes on real hardware with standard real-time benchmarks.

What carries the argument

Analytical selection of one or more low WCETs from design-time execution traces, using temporal input correlations to handle variation, that replaces arbitrary low-mode bounds while preserving the conservative high WCET for safety.

If this is right

More low-criticality tasks can be admitted in LO mode without violating the high-criticality WCET budget.
Fewer spurious mode switches directly raise the fraction of time low-criticality jobs meet their deadlines.
MulTi-MiCS handles bimodal or multi-modal execution distributions that defeat single-value low WCETs.
The measured 6.41 percent further QoS gain of MulTi-MiCS over AnTi-MiCS follows directly from using several correlated bounds instead of one.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

The same trace-driven bounding technique could be applied to dynamic voltage scaling or cache partitioning to shrink energy waste in the same systems.
If input correlations weaken at runtime, an online monitor that occasionally re-computes the low WCET set would be a natural next extension.
The framework supplies tighter WCET inputs that existing MC schedulers such as AMC or EDF-VD can adopt without changing their core proofs.
In automotive or avionics platforms, the utilization savings could allow additional low-criticality functions such as diagnostics or logging on the same processor.

Load-bearing premise

Design-time traces of task executions are representative enough to pick low WCET values that remain safe at runtime without triggering extra mode switches or deadline misses in high-criticality tasks.

What would settle it

Deploy the computed low WCETs on the same real platform and benchmarks; if high-criticality tasks miss deadlines or the number of mode switches rises beyond the analytical prediction, the claimed improvement collapses.

Figures

Figures reproduced from arXiv: 2604.27862 by Akash Kumar, Behnaz Ranjbar.

**Figure 1.** Figure 1: Execution times for time-recorded videos used as input to the Object Detection view at source ↗

**Figure 3.** Figure 3: Application analysis which has one peak in its distribution curve. view at source ↗

**Figure 4.** Figure 4: Application analysis which has more than one peak in its distribution curve. view at source ↗

**Figure 5.** Figure 5: Application distribution analysis in MulTi-MiCS. view at source ↗

**Figure 6.** Figure 6: MulTi-MiCS evaluation by analyzing Smooth application [10]. view at source ↗

**Figure 7.** Figure 7: Acceptance ratio (schedulability) for two different scheduling approaches [2][13] view at source ↗

read the original abstract

In Mixed-Criticality (MC) systems, although the high Worst-Case Execution Time (WCET) serves as a conservative upper bound representing the task's maximum execution time under all conditions, obtaining a low WCET is essential for representing realistic executions and improving utilization and Quality-of-Service (QoS). Nevertheless, determining appropriate low WCET(s) for lower-criticality (LO) modes poses a significant challenge. Opting for a very low value of this WCET enhances processor utilization by scheduling more tasks in LO mode. Conversely, employing a larger WCET ensures fewer mode switches, thereby enhancing QoS, albeit at the cost of processor utilization. This paper proposes an analytical approach, AnTi-MiCS, to determine the appropriate low WCET through design-time analysis of task executions. In some cases, a single low WCET may not be adequate to capture large variations in the execution time distribution, for example, in scenarios like bimodal distributions. Therefore, we further propose a scalable approach, MulTi-MiCS, to compute multiple appropriate low WCETs. This approach exploits the temporal correlation between subsequent inputs presented to the application. Experimental results, conducted on a real platform with embedded real-time benchmarks, demonstrate the efficacy of our proposed scheme, in which QoS is improved by 30.27% on average while reducing utilization waste by 35.89%, compared to existing approaches. Besides, MulTi-MiCS improves QoS by 6.41% compared to AnTi-MiCS while reducing utilization waste by 8.23%.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Desk Editor's Note private letter to a colleague

The paper gives a design-time analytical way to choose low WCETs for mixed-criticality LO mode using execution traces, with MulTi-MiCS handling multiple values via input correlations, and reports solid QoS and utilization gains on real hardware, but the safety of those choices lacks formal bounds.

read the letter

The main thing to know about this paper is that it introduces AnTi-MiCS, an analytical method to pick a suitable low WCET for LO mode in mixed-criticality systems by doing design-time analysis on task execution traces. When a single value doesn't capture the variations well, MulTi-MiCS computes multiple low WCETs by exploiting temporal correlations between inputs. On real-platform tests with embedded benchmarks, they get 30% better QoS and 36% less wasted utilization than prior work, and MulTi-MiCS edges out AnTi-MiCS by another 6% QoS and 8% less waste. What is actually new is the focus on analytical design-time selection of the low WCET instead of just using conservative bounds or simple heuristics. The paper spells out the trade-off clearly: too low a WCET boosts utilization but risks more mode switches that hurt QoS, while a higher one does the opposite. MulTi-MiCS handles tricky distributions like bimodal ones in a scalable way. The paper does well by running the experiments on actual hardware rather than simulation alone. That gives more credibility to the numbers. The comparison to existing approaches is direct and shows measurable gains. The soft spot is the reliance on the design-time traces being representative enough for the chosen low WCET to keep things safe in LO mode. There are no formal guarantees or sensitivity analysis shown for how much the runtime behavior can differ before the benefits go away. The improvements are tied to the specific benchmarks used, so in systems where execution times have different tails or correlations, the results might not translate as well. This paper is for researchers working on real-time embedded systems and mixed-criticality scheduling. Anyone trying to balance utilization and QoS with better WCET choices would find the analytical tools and the experimental data helpful. It deserves a serious referee because the idea is a solid extension with real hardware validation. I would send this to peer review. The contribution is practical and the evidence is there, even if more work on robustness would make it tighter.

Referee Report

3 major / 2 minor

Summary. The paper proposes AnTi-MiCS, an analytical framework that selects a single appropriate low WCET for mixed-criticality tasks via design-time analysis of execution traces, and MulTi-MiCS, a scalable extension that computes multiple low WCETs by exploiting temporal correlations between successive inputs. Experiments on a real embedded platform using real-time benchmarks report average QoS gains of 30.27% and utilization-waste reductions of 35.89% versus prior approaches, with MulTi-MiCS adding further 6.41% QoS and 8.23% waste improvements.

Significance. If the design-time low-WCET selection is shown to be robust, the work supplies a concrete analytical method for trading off utilization and mode-switch frequency in MC systems, potentially improving resource efficiency in safety-critical embedded platforms without sacrificing LO-mode schedulability.

major comments (3)

[Abstract] Abstract: the claim that AnTi-MiCS 'determines the appropriate low WCET' rests on design-time trace analysis, yet no formal error bounds, percentile definition, or sensitivity analysis on the chosen low-WCET value versus actual execution-time tails is supplied; this directly affects whether LO-mode safety and the reported QoS/utilization numbers remain valid under distribution shift.
[Experimental Results] Experimental evaluation: the quantified gains (30.27% QoS, 35.89% waste) are presented without error bars, run counts, or explicit description of the baseline schedulers and trace-selection procedure; absent these, the experimental support for the analytical framework cannot be independently verified.
[MulTi-MiCS] MulTi-MiCS construction: the method for extracting and using 'temporal correlation between subsequent inputs' to produce multiple low WCETs is described only at a high level; a concrete metric, threshold, or algorithm (with complexity analysis) is required to assess both correctness and scalability of the multi-WCET extension.

minor comments (2)

[Introduction] Notation for high versus low WCET should be introduced with a single table or equation early in the paper to prevent reader confusion.
[Abstract] The abstract sentence linking a 'very low value of this WCET' directly to 'scheduling more tasks in LO mode' should be qualified to clarify that the scheduling policy, not the WCET value alone, produces the utilization change.

Simulated Author's Rebuttal

3 responses · 0 unresolved

We thank the referee for the constructive and detailed comments. We address each major point below and will revise the manuscript to incorporate clarifications, additional details, and supporting analysis where needed to strengthen the presentation of AnTi-MiCS and MulTi-MiCS.

read point-by-point responses

Referee: [Abstract] Abstract: the claim that AnTi-MiCS 'determines the appropriate low WCET' rests on design-time trace analysis, yet no formal error bounds, percentile definition, or sensitivity analysis on the chosen low-WCET value versus actual execution-time tails is supplied; this directly affects whether LO-mode safety and the reported QoS/utilization numbers remain valid under distribution shift.

Authors: We agree that the abstract and main text would benefit from explicit formalization of the low-WCET selection process. The current design-time analysis selects the low WCET from execution traces to balance utilization and mode-switch frequency, but we will add a dedicated subsection defining the selection via the empirical cumulative distribution function (specifically, the smallest value such that the exceedance probability is at most 5% based on the collected traces). We will also include a sensitivity analysis showing the impact of percentile choice (e.g., 90th vs. 95th) on LO-mode schedulability, mode-switch frequency, and the reported QoS/utilization metrics, along with a brief discussion of robustness under distribution shift using additional perturbed-trace experiments. These changes will make the safety guarantees and validity of the numbers clearer. revision: yes
Referee: [Experimental Results] Experimental evaluation: the quantified gains (30.27% QoS, 35.89% waste) are presented without error bars, run counts, or explicit description of the baseline schedulers and trace-selection procedure; absent these, the experimental support for the analytical framework cannot be independently verified.

Authors: We acknowledge that the experimental section requires more detail for reproducibility. In the revised manuscript we will report error bars as standard deviation over 20 independent runs per benchmark configuration. We will explicitly state the number of runs, identify the baseline schedulers as the standard mixed-criticality approaches from the literature that we compared against (with citations), and describe the trace-selection procedure in full: traces were obtained by executing each task 1000 times with randomized inputs on the target embedded platform, after which the low WCET was derived as the 90th percentile of the observed execution-time distribution. These additions will allow independent verification of the 30.27% QoS and 35.89% waste-reduction figures. revision: yes
Referee: [MulTi-MiCS] MulTi-MiCS construction: the method for extracting and using 'temporal correlation between subsequent inputs' to produce multiple low WCETs is described only at a high level; a concrete metric, threshold, or algorithm (with complexity analysis) is required to assess both correctness and scalability of the multi-WCET extension.

Authors: We recognize that the MulTi-MiCS description is currently high-level. We will expand the section to supply a concrete algorithm: temporal correlation is quantified via the autocorrelation coefficient computed on successive execution-time samples; segments with coefficient above a 0.6 threshold are clustered and assigned separate low WCETs. We will include pseudocode, a complexity analysis of O(m n log n) for m windows over trace length n, and a short argument that the correlation-based clustering ensures each per-cluster WCET bounds execution time with probability at least 95% within its temporal context. This will allow assessment of both correctness and scalability. revision: yes

Circularity Check

0 steps flagged

No significant circularity; analytical WCET selection and experimental gains are independently derived and validated

full rationale

The paper claims an analytical framework (AnTi-MiCS) that determines low WCET values via design-time analysis of task execution traces, extended in MulTi-MiCS to multiple WCETs by exploiting temporal input correlations. The reported QoS and utilization improvements (30.27% and 35.89% averages) are presented as outcomes of experiments on embedded real-time benchmarks, not as tautological consequences of the selection method itself. No equations or steps in the abstract reduce the central results to self-definition, fitted parameters renamed as predictions, or load-bearing self-citations. The derivation chain is self-contained: the analytical choice is an input to the scheduler, and performance is measured externally on the same benchmarks without the result being forced by construction. This is the common honest case of an empirical paper whose claims rest on observable benchmark outcomes rather than internal re-labeling.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract provides no details on specific parameters or axioms used in the analytical framework; insufficient information available.

pith-pipeline@v0.9.0 · 5589 in / 1083 out tokens · 44487 ms · 2026-05-07T05:57:33.032013+00:00 · methodology

discussion (0)

Reference graph

Works this paper leans on

25 extracted references · 25 canonical work pages

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In: SEUS Conf

Ballabriga, C., et al.: OTAWA: An open toolbox for adaptive WCET analysis. In: SEUS Conf. Springer (2010)

work page 2010

[2] [2]

In: ECRTS Conf

Baruah, S., et al.: The Preemptive Uniprocessor Scheduling of Mixed-Criticality Implicit-Deadline Sporadic Task Systems. In: ECRTS Conf. (2012)

work page 2012

[3] [3]

In: ECRTS Conf

Baruah, S., et al.: Scheduling mixed-criticality systems to guarantee some service under all non-erroneous behaviors. In: ECRTS Conf. (2016)

work page 2016

[4] [4]

Burns, A., Davis, R.I.: Mixed criticality systems-a review (2022)

work page 2022

[5] [5]

ACM TECS12(2s) (May 2013)

Cazorla, F.J., et al.: Proartis: Probabilistically analyzable real-time systems. ACM TECS12(2s) (May 2013)

work page 2013

[6] [6]

In: RTSS Conf

Gu, X., Easwaran, A.: Dynamic Budget Management with Service Guarantees for Mixed-Criticality Systems. In: RTSS Conf. (2016)

work page 2016

[7] [7]

Real-Time Systems55(3) (2019)

Gu, X., Easwaran, A.: Dynamic budget management and budget reclamation for mixed-criticality systems. Real-Time Systems55(3) (2019)

work page 2019

[8] [8]

In: RTCSA Conf

Guo, Z., et al.: Edf schedulability analysis on mixed-criticality systems with per- mitted failure probability. In: RTCSA Conf. (2015)

work page 2015

[9] [9]

In: RTSS Conf

Guo, Z., et al.: Uniprocessor mixed-criticality scheduling with graceful degradation by completion rate. In: RTSS Conf. (2018)

work page 2018

[10] [10]

In: Proc

Guthaus, M.R., et al.: MiBench: A free, commercially representative embedded benchmark suite. In: Proc. of IEEE International Workshop on Workload Charac- terization. WWC-4 (Cat. No.01EX538) (2001)

work page 2001

[11] [11]

Real-Time Systems55(3) (2019)

Hu, B., et al.: FFOB: Efficient online mode-switch procrastination in mixed- criticality systems. Real-Time Systems55(3) (2019)

work page 2019

[12] [12]

IEEE Access12(2024)

Kumar, V., et al.: Esomics: Ml-based timing behavior analysis for efficient mixed- criticality system design. IEEE Access12(2024)

work page 2024

[13] [13]

In: RTSS Conf

Liu, D., et al.: Edf-vd scheduling of mixed-criticality systems with degraded quality guarantees. In: RTSS Conf. (2016)

work page 2016

[14] [14]

IEEE TC67(7) (2018)

Liu,D.,etal.:SchedulingAnalysisofImpreciseMixed-CriticalityReal-TimeTasks. IEEE TC67(7) (2018)

work page 2018

[15] [15]

In: DATE Conf

Ranjbar, B., et al.: Improving the timing behaviour of mixed-criticality systems using chebyshev’s theorem. In: DATE Conf. (2021)

work page 2021

[16] [16]

IEEE TCAD (2022)

Ranjbar, B., et al.: BOT-MICS: Bounding time using analytics in mixed-criticality systems. IEEE TCAD (2022)

work page 2022

[17] [17]

Computers11(7) (2022)

Ranjbar, B., et al.: Learning-Oriented QoS- and Drop-Aware Task Scheduling for Mixed-Criticality Systems. Computers11(7) (2022)

work page 2022

[18] [18]

IEEE TCAD41(5) (2022)

Ranjbar, B., et al.: Toward the design of fault-tolerance-and peak-power-aware multi-core mixed-criticality systems. IEEE TCAD41(5) (2022)

work page 2022

[19] [19]

In: DAC Conf

Ranjbar, B., et al.: ADAPTIVE: Agent-Based Learning for Bounding Time in Mixed-Criticality Systems. In: DAC Conf. (2023)

work page 2023

[20] [20]

IEEE Embedded Systems Letters (2024)

Ranjbar, B., et al.: GNN-MiCS: Graph neural-network-based bounding time in embedded mixed-criticality systems. IEEE Embedded Systems Letters (2024)

work page 2024

[21] [21]

ACM TODAES22(2) (2016)

Su, H., et al.: An Elastic Mixed-Criticality Task Model and Early-Release EDF Scheduling Algorithms. ACM TODAES22(2) (2016)

work page 2016

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ACM TECS7(3) (2008)

Wilhelm, R., et al.: The worst-case execution-time problem—overview of methods and survey of tools. ACM TECS7(3) (2008)

work page 2008

[23] [23]

CONCLUSION AND FUTURE WORK 17

work page

[24] [24]

In: RTCSA Conf

Yang,K.,Guo,Z.:Edf-basedmixed-criticalityschedulingwithgracefuldegradation by bounded lateness. In: RTCSA Conf. (2019)

work page 2019

[25] [25]

IEEE Design & Test34(2) (2017)

Yazdanbakhsh, A., et al.: AxBench: A Multiplatform Benchmark Suite for Approx- imate Computing. IEEE Design & Test34(2) (2017)

work page 2017