Integrity report for Resource Utilization of Differentiable Logic Gate Networks Deployed on FPGAs

A machine-verified record of the checks Pith has run against this paper: detector runs, findings, signed bundle events, and canonical identifiers.

arXiv:2605.04109

0Critical

0Advisory

3Detectors run

2026-05-20Last checked

Paper page arXiv integrity.json

Detector runs

ai_meta_artifact completed v1.0.0 · findings 0 · 2026-05-20 14:35:33.194604+00:00

doi_title_agreement completed v1.0.0 · findings 0 · 2026-05-20 01:31:21.876680+00:00

doi_compliance completed v1.0.0 · findings 0 · 2026-05-19 15:34:38.537102+00:00

Findings

No public integrity findings for this paper.

Signed record

The machine-readable record for this paper lives at /pith/2605.04109/integrity.json. Pith Number bundles also include signed pith.integrity.v1 events where a Pith Number exists.