A micromechanical frequency reference with parts-per-trillion holdover stability
Pith reviewed 2026-05-12 00:44 UTC · model grok-4.3
The pith
A 268 MHz silicon MEMS clock reaches 8 parts-per-trillion fractional frequency stability at 8-hour averages by locking to dual resonances.
A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.
Core claim
We demonstrate a 268 MHz MEMS clock that achieves record fractional frequency stability of ~8 parts-per-trillion at an averaging time of 8 hours, competitive with chip-scale atomic clocks. This performance is obtained with a single-crystal silicon electrostatic resonator that has no currently known intrinsic drift mechanism and is protected by wafer-level encapsulation. Gain variations in the sustaining electronics are identified as the dominant limitation in conventional phase-locked designs; these are removed by implementing a frequency-locked loop based on dual-frequency resonance tracking that eliminates the specific gain of the supporting electronics as a frequency-determining variable.
What carries the argument
Dual-frequency resonance tracking (DFRT) frequency-locked loop architecture that decouples resonator frequency from the gain of the sustaining electronics
If this is right
- MEMS clocks can reach holdover stability competitive with chip-scale atomic clocks in a compact form factor.
- Gain-insensitive DFRT locking becomes a general method for high-stability MEMS frequency references.
- Combining DFRT with dual-mode tracking and ratiometric temperature stabilization produces dramatic long-term stability gains.
- Single-crystal silicon resonators under wafer-level encapsulation exhibit no currently known intrinsic drift mechanisms.
Where Pith is reading between the lines
- The same dual-resonance approach could be applied to other MEMS sensors whose output depends on electronic parameters.
- Portable devices could adopt this level of timing precision without carrying an atomic clock.
- Longer-term measurements beyond 8 hours would test whether the reported stability continues or saturates at other limits.
- Similar frequency-tracking techniques might reduce drift in related micromechanical devices such as oscillators or filters.
Load-bearing premise
That the encapsulated single-crystal silicon resonator has no unknown intrinsic long-term drift and that dual-frequency tracking fully removes every contribution from electronic gain and temperature sensitivity.
What would settle it
A controlled test that records frequency drift larger than 8 parts per trillion over 8 hours while temperature and electronics remain stable would show that unaccounted drift sources still limit performance.
Figures
read the original abstract
Microelectromechanical (MEMS) resonators are widely used in timekeeping applications, and recent advances in fabrication, materials, and encapsulation technology have advanced their potential as high stability frequency references. However, for holdover applications that require the highest levels of long-term frequency stability, compact vapor atomic clocks remain dominant. In this work, we demonstrate a 268 MHz MEMS clock that achieves record fractional frequency stability of ~8 parts-per-trillion at an averaging time of 8 hours, competitive with chip-scale atomic clocks. We achieved this using a single-crystal silicon electrostatic resonator that has no currently known intrinsic drift mechanism and is protected from the environment with a wafer-level encapsulation. We specifically identify gain variations in the sustaining electronics as the dominant limitation in conventional phase-locked oscillator architectures -- originating from temperature sensitivity and drifts in the electronic components -- and overcome this by implementing a frequency-locked loop architecture based on dual-frequency resonance tracking (DFRT). This novel approach removes the specific gain of the supporting electronics as a frequency determining variable in the oscillator. When combined with dual-mode tracking and ratiometric temperature stabilization of the resonator, this approach enables a dramatic enhancement to long-term frequency stability and establishes gain-insensitive DFRT locking as a general paradigm for high-stability MEMS clocks.
Editorial analysis
A structured set of objections, weighed in public.
Referee Report
Summary. The manuscript reports an experimental demonstration of a 268 MHz MEMS frequency reference based on a single-crystal silicon electrostatic resonator with wafer-level encapsulation. The authors identify gain variations in sustaining electronics as the dominant prior limitation in conventional oscillators and implement a dual-frequency resonance tracking (DFRT) frequency-locked loop architecture, combined with dual-mode ratiometric temperature stabilization, to achieve a claimed fractional frequency stability of ~8 parts-per-trillion at 8 hours averaging time, competitive with chip-scale atomic clocks. The central innovation is the assertion that DFRT renders the output frequency independent of electronics gain.
Significance. If substantiated with full supporting data, this would represent a notable advance in micromechanical timekeeping by closing much of the stability gap between MEMS resonators and atomic references for holdover applications. The DFRT approach offers a potentially generalizable method to decouple oscillator frequency from electronic component drifts, which could influence design of other high-stability MEMS devices. The work is grounded in direct experimental measurement rather than simulation or parameter fitting.
major comments (2)
- [DFRT architecture and frequency-locked loop description] The claim that DFRT fully removes sustaining-electronics gain as a frequency-determining variable (detailed in the architecture and DFRT sections) is load-bearing for attributing the stability improvement to the new locking scheme. This holds only under assumptions of perfect mode orthogonality, infinite DC loop gain, and absence of cross-mode coupling or amplitude-dependent shifts. No explicit experimental test is described, such as deliberate variation of amplifier transconductance while logging frequency output, nor a derivation of the closed-loop transfer function from gain to frequency showing it is identically zero. Without such verification, the removal of gain sensitivity remains an assumption rather than a demonstrated result.
- [Results and stability measurements] The headline stability result of ~8 ppt at 8 hours (reported in the results section and associated Allan deviation figure) requires supporting quantitative details to be load-bearing: error bars on the stability metric, full long-term frequency trace data, and a direct comparison table against prior MEMS and chip-scale atomic clock performance metrics. The abstract and results text state the value but the absence of these elements in the presented data weakens the 'record' and 'competitive' assertions.
minor comments (2)
- [Introduction and resonator fabrication] The statement that single-crystal silicon 'has no currently known intrinsic drift mechanism' (introduction and resonator description) should be supported by specific citations to long-term drift studies or a brief discussion of why known mechanisms (e.g., stress relaxation, contamination) are ruled out under the encapsulation conditions.
- [Figures and captions] Figure captions and axis labels in the stability plots could be clarified to explicitly state averaging times, measurement bandwidth, and whether the data include the full 8-hour trace or only selected segments.
Simulated Author's Rebuttal
We thank the referee for their thorough and constructive review. We address each major comment below and will revise the manuscript to strengthen the presentation of the DFRT architecture and the stability results.
read point-by-point responses
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Referee: [DFRT architecture and frequency-locked loop description] The claim that DFRT fully removes sustaining-electronics gain as a frequency-determining variable (detailed in the architecture and DFRT sections) is load-bearing for attributing the stability improvement to the new locking scheme. This holds only under assumptions of perfect mode orthogonality, infinite DC loop gain, and absence of cross-mode coupling or amplitude-dependent shifts. No explicit experimental test is described, such as deliberate variation of amplifier transconductance while logging frequency output, nor a derivation of the closed-loop transfer function from gain to frequency showing it is identically zero. Without such verification, the removal of gain sensitivity remains an assumption rather than a demonstrated result.
Authors: We agree that explicit verification strengthens the central claim. In the revised manuscript we will add a derivation of the closed-loop transfer function showing that the locked output frequency is independent of sustaining-amplifier gain to first order under the DFRT architecture (assuming finite but high loop gain and the measured mode orthogonality). We will also include new experimental data in which amplifier transconductance is deliberately varied while the DFRT loop is closed, demonstrating that the output frequency remains unchanged within the measurement noise floor. These additions will convert the theoretical independence into a demonstrated result. revision: yes
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Referee: [Results and stability measurements] The headline stability result of ~8 ppt at 8 hours (reported in the results section and associated Allan deviation figure) requires supporting quantitative details to be load-bearing: error bars on the stability metric, full long-term frequency trace data, and a direct comparison table against prior MEMS and chip-scale atomic clock performance metrics. The abstract and results text state the value but the absence of these elements in the presented data weakens the 'record' and 'competitive' assertions.
Authors: We accept that these supporting elements are needed for the result to be fully load-bearing. In the revision we will add statistical error bars to the Allan deviation plot, include the complete long-term frequency time series as supplementary material, and insert a comparison table that places the 8 ppt / 8 h result against representative prior MEMS resonators and chip-scale atomic clocks using the same metrics (Allan deviation at 8 h, power, volume). These changes will allow readers to evaluate the claimed performance directly. revision: yes
Circularity Check
No significant circularity; experimental demonstration with independent measurements
full rationale
The paper presents an experimental MEMS clock demonstration achieving measured fractional frequency stability of ~8 ppt at 8 hours. The central claim rests on physical fabrication, wafer-level encapsulation, dual-frequency resonance tracking (DFRT) implementation, and direct Allan deviation measurements rather than any derivation that reduces to fitted parameters or self-referential equations. No load-bearing steps invoke self-citation chains, ansatzes smuggled via prior work, or renaming of known results as new predictions. The DFRT architecture is described as removing electronics gain as a variable through mode tracking and ratiometric stabilization, but this is presented as an implemented technique whose efficacy is shown by the reported stability data, not derived by construction from the inputs. The result is self-contained against external benchmarks and does not exhibit any of the enumerated circularity patterns.
Axiom & Free-Parameter Ledger
axioms (1)
- domain assumption Single-crystal silicon electrostatic resonator has no currently known intrinsic drift mechanism
Reference graph
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