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arxiv: 2605.25798 · v1 · pith:EQB7JKKUnew · submitted 2026-05-25 · 💻 cs.AR

DiSC: Resolution-Scalable Acceleration of Diffusion Models by Exploiting Sparsity and Cached Token Reuse with Hash-based Distribution

Jieon Yoon , Hangyeol Lee , Jaehoon Heo , Joo-Young Kim This is my paper

Pith reviewed 2026-06-29 19:30 UTC · model grok-4.3

classification 💻 cs.AR
keywords diffusion modelshardware acceleratorsparsitytoken reuseself-attentionenergy efficiencyresolution scalabilityDiT
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The pith

DiSC accelerates diffusion transformers by reusing cached tokens and sparsity masks on hash-distributed dense compute engines without dedicated sparse hardware.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

Diffusion models incur high costs from repeated quadratic self-attention across denoising steps at high resolutions. DiSC counters this with two software algorithms: Cached Token Reuse translates spatial variations in latent differences into per-token reuse decisions to skip redundant work, while Softmax Thresholding with Sparsity Mask Reuse generates and re-applies a sparsity pattern across steps by exploiting temporal similarity. These produce a hybrid dense-sparse workload that the hardware exploits through hash-based distribution across on-chip memory banks, allowing the same compute engines to process both dense and sparse attention with low overhead. The design targets resolution scalability and is evaluated on DiT and PixArt-Sigma models.

Core claim

DiSC establishes that Cached Token Reuse (CTR), which converts spatial latent differences into token-level reuse decisions, combined with Softmax Thresholding and Sparsity Mask Reuse (ST), which reuses generated sparsity patterns, can be efficiently executed by a hash-based distribution over memory banks that reuses existing dense compute engines for the induced sparse operations, delivering 3.47-4.74x speedups and 46.4-68.1% energy savings over A100 and H100 GPUs on DiT and PixArt-Sigma.

What carries the argument

Hash-based distribution over on-chip memory banks that reuses dense compute engines for the sparse attention workload created by CTR and ST.

If this is right

  • Eliminates redundant token computations in iterative denoising without per-step overhead.
  • Reuses a single sparsity pattern across steps to bypass prediction costs in attention.
  • Achieves resolution-scalable speedups and energy savings on transformer-based diffusion models.
  • Avoids extra hardware area by mapping sparse operations onto existing dense engines via hashing.
  • Yields moderate sparsity levels that fit a hybrid workload on unified dataflow.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The reuse decisions based on latent differences might apply to other iterative generative processes such as autoregressive image synthesis.
  • Hash distribution could lower silicon area in future specialized chips for attention-heavy workloads.
  • Temporal similarity exploited by ST might extend to video diffusion models where frame-to-frame coherence is high.
  • Combining CTR with existing model compression methods could compound the efficiency gains beyond what the paper measures.

Load-bearing premise

Spatial variations in latent differences across denoising steps stay stable enough to support reliable token reuse decisions without visible artifacts or needing per-step mask recomputation.

What would settle it

Running the DiSC hardware on a new high-resolution diffusion model and measuring either no speedup relative to a dense baseline or visible image quality degradation from incorrect reuse decisions.

Figures

Figures reproduced from arXiv: 2605.25798 by Hangyeol Lee, Jaehoon Heo, Jieon Yoon, Joo-Young Kim.

Figure 1
Figure 1. Figure 1: FLOPs Breakdown of PixArt-Σ across different resolutions lowing this trend, many subsequent models, such as Stable Diffusion3 [4], PixArt-α [5] and PixArt-Σ [6] have adopted transformer backbone. Due to their inherent iterative nature—requiring multiple denoising steps—diffusion models incur significantly higher computational cost relative their model size. This computa￾tional burden is further exacerbated… view at source ↗
Figure 2
Figure 2. Figure 2: Overview of Diffusion Model workload results in an inefficient area trade-off, as their ded￾icated sparse units suffer from severe under-utilization during the dense operations. Therefore, a new architecture is required that can efficiently handle this specific workload. At the hardware level, we propose a specialized architecture and a unified dataflow that are purpose-built for this workload. Instead of … view at source ↗
Figure 4
Figure 4. Figure 4: Heatmap of cosine similarity between the outputs of attention and [PITH_FULL_IMAGE:figures/full_fig_p003_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Heatmap of input latent zt (1st head shown from total 4 heads) at adjacent timesteps (12th and 13th timestep) and their difference in the PixArt￾Σ model C. Motivation for Cached Token Reuse The iterative denoising process of diffusion models inherently results in a high degree of temporal similarity in interme￾diate layer outputs across adjacent timesteps. This charac￾teristic is well-established and has b… view at source ↗
Figure 6
Figure 6. Figure 6: The Process of Patch Embedding 0.0000 0.0010 0.0002 0.0004 0.0006 0.0008 Attention Probability @ Step4 @ Step5 @ Step15 @ Step16 [PITH_FULL_IMAGE:figures/full_fig_p004_6.png] view at source ↗
Figure 10
Figure 10. Figure 10: Process of Softmax Thresholding with Sparsity Mask Reuse [PITH_FULL_IMAGE:figures/full_fig_p005_10.png] view at source ↗
Figure 9
Figure 9. Figure 9: Cached Token Reuse (CTR) Process in timestep [PITH_FULL_IMAGE:figures/full_fig_p005_9.png] view at source ↗
Figure 11
Figure 11. Figure 11: illustrates the overall hardware architecture of DiSC, which is co-designed to execute CTR and ST. Each DiSC core comprises a Dot Product Unit (DPU) array for matrix mul￾tiplications, a Vector Processing Unit (VPU) for non-matrix operations, and specialized support unit including a Token Selector and Data Aligner. A top controller orchestrates the core’s operations, using sparsity masks and token indices … view at source ↗
Figure 13
Figure 13. Figure 13: SDDMM execution with Hash-based Distribution [PITH_FULL_IMAGE:figures/full_fig_p007_13.png] view at source ↗
Figure 15
Figure 15. Figure 15: Load Balancing Across DPUs for Different Hash Functions. The [PITH_FULL_IMAGE:figures/full_fig_p008_15.png] view at source ↗
Figure 16
Figure 16. Figure 16: Data Alignment and Row Reordering for Hash-Based Mapping. [PITH_FULL_IMAGE:figures/full_fig_p008_16.png] view at source ↗
Figure 17
Figure 17. Figure 17: FLOPs Reduction in (a) Self-Attention layer and (b) total steps of [PITH_FULL_IMAGE:figures/full_fig_p009_17.png] view at source ↗
Figure 18
Figure 18. Figure 18: (a) Speedup over NVIDIA A100 GPU (b) Relative Energy Con [PITH_FULL_IMAGE:figures/full_fig_p010_18.png] view at source ↗
Figure 19
Figure 19. Figure 19: Visual comparison of generated images on PixArt- [PITH_FULL_IMAGE:figures/full_fig_p010_19.png] view at source ↗
read the original abstract

Transformer-based diffusion models offer superior scalability and performance but suffer from high computational overhead due to the iterative nature and quadratic complexity of self-attention at high resolutions. In this paper, we propose DiSC, a resolution-scalable, sparsity-aware hardware accelerator. At the software level, DiSC introduces two algorithms: Cached Token Reuse (CTR), and Softmax Thresholding with Sparsity Mask Reuse (ST). CTR introduces a mechanism that translates spatial variations in the input latent difference across steps into a token-level reuse decision, effectively eliminating redundant token computation. ST induces sparsity in attention operations by reusing a generated sparsity pattern, leveraging temporal similarity to bypass costly prediction overhead. Together, these algorithms provide resolution-scalable computational benefits and yield a moderate sparsity and hybrid dense-sparse workload. To exploit this efficiently, we design a specialized hardware architecture and unified dataflow. This architecture avoids dedicated sparsity-handling components; instead, a hash-based distribution over on-chip memory banks allows DiSC to reuse its existing compute engines for sparse operations, efficiently exploiting the induced sparsity with minimal hardware overhead. Evaluated on DiT and PixArt-Sigma, DiSC achieves 3.47-4.74x and 2.48-3.50x speedups over NVIDIA A100 and H100 GPUs, respectively, with energy savings ranging from 46.4% to 68.1%.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper proposes DiSC, a hardware accelerator for transformer-based diffusion models (DiT, PixArt-Sigma) that combines two software techniques—Cached Token Reuse (CTR), which maps spatial variations in latent differences across denoising steps to per-token reuse decisions, and Softmax Thresholding with Sparsity Mask Reuse (ST), which reuses attention sparsity patterns via temporal similarity—with a hash-based on-chip memory distribution that allows reuse of existing dense compute engines for the resulting hybrid dense-sparse workload. The central claim is that this co-design yields resolution-scalable speedups of 3.47-4.74× (A100) and 2.48-3.50× (H100) together with 46.4–68.1 % energy reduction.

Significance. If the empirical claims hold after the stability assumption is validated, the result would be significant for computer-architecture research on generative-model acceleration: it demonstrates that temporal reuse and moderate sparsity can be exploited without custom sparse hardware, using only a lightweight hash distribution. This is a concrete, falsifiable hardware–software co-design point that could influence both accelerator design and diffusion-model scheduling.

major comments (2)
  1. [CTR description (abstract and §3)] CTR description (abstract and §3): the headline speedups rest on the assumption that spatial patterns of latent differences remain sufficiently stable across steps to permit reliable token-level reuse decisions without visible artifacts or per-step mask recomputation. No reuse-frequency statistics, quality metrics (e.g., FID or perceptual scores with/without reuse), or ablation of the reuse threshold are supplied; if the pattern changes rapidly, either artifacts appear or the mask must be recomputed each step, eliminating the claimed savings. This is load-bearing for the 3.47–4.74× claim.
  2. [Evaluation section (§5)] Evaluation section (§5): the reported speedups and energy numbers are presented as direct measurements, yet no breakdown is given separating the contribution of CTR versus ST, nor any sensitivity analysis to the sparsity threshold or hash-distribution parameters. Without these data it is impossible to determine whether the gains are robust or specific to the two evaluated models.
minor comments (2)
  1. [Hardware architecture (§4)] Notation for the hash function and bank mapping is introduced without a compact equation or pseudocode; a small diagram or equation would clarify how collisions are handled.
  2. [Abstract and §3] The abstract states “moderate sparsity” but never quantifies the achieved sparsity ratio or its variation across layers and steps; adding a table or plot would strengthen the sparsity claim.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive feedback. We address each major comment below and will revise the manuscript to incorporate additional analyses where the original submission was incomplete.

read point-by-point responses

  1. Referee: [CTR description (abstract and §3)] CTR description (abstract and §3): the headline speedups rest on the assumption that spatial patterns of latent differences remain sufficiently stable across steps to permit reliable token-level reuse decisions without visible artifacts or per-step mask recomputation. No reuse-frequency statistics, quality metrics (e.g., FID or perceptual scores with/without reuse), or ablation of the reuse threshold are supplied; if the pattern changes rapidly, either artifacts appear or the mask must be recomputed each step, eliminating the claimed savings. This is load-bearing for the 3.47–4.74× claim.

    Authors: We agree that the stability assumption underlying CTR is central to the reported speedups and that the original manuscript lacks the requested supporting data. Although the evaluated models showed no visible artifacts, we did not report reuse-frequency statistics, FID or perceptual quality metrics comparing runs with and without CTR, or an ablation on the reuse threshold. We will add these elements—including per-step reuse rates, quality metrics, and threshold sensitivity—in the revised version to validate the assumption. revision: yes

  2. Referee: [Evaluation section (§5)] Evaluation section (§5): the reported speedups and energy numbers are presented as direct measurements, yet no breakdown is given separating the contribution of CTR versus ST, nor any sensitivity analysis to the sparsity threshold or hash-distribution parameters. Without these data it is impossible to determine whether the gains are robust or specific to the two evaluated models.

    Authors: We concur that the evaluation section would be strengthened by an explicit breakdown of CTR versus ST contributions and by sensitivity analysis on the sparsity threshold and hash-distribution parameters. The current results reflect the combined system on DiT and PixArt-Sigma; we will include ablations isolating each technique and parameter sweeps in the revision to demonstrate robustness beyond the two models. revision: yes

Circularity Check

0 steps flagged

No circularity; performance claims are direct measurements

full rationale

The provided abstract and description contain no equations, fitted parameters, or first-principles derivations. Speedup and energy figures are stated as empirical evaluation results on DiT and PixArt-Sigma. CTR and ST are introduced as new algorithmic mechanisms whose benefits are measured rather than predicted from prior quantities within the paper. No self-citation chains, self-definitional loops, or renamed known results appear in the load-bearing claims. The work is self-contained as an engineering design paper whose central results do not reduce to their own inputs by construction.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Abstract-only review supplies no explicit free parameters, axioms, or invented entities; the threshold in Softmax Thresholding is implicitly a tunable value but is not quantified.

pith-pipeline@v0.9.1-grok · 5796 in / 1329 out tokens · 27395 ms · 2026-06-29T19:30:11.956881+00:00 · methodology

discussion (0)

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