Paper Citation Record · LEDGER

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring

As of 8 August 2026, this Paper Citation Record lists 37 of 37 outbound references and 0 inbound Pith citation observations for arXiv:2607.05657.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2607.05657 v1

Coverage vector

measured 37 of 37 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-07-11T04:14:48.006637Z

measured 37 of 37 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

37 of 37 outbound references displayed

verified exact2
verified fuzzy34
unresolved1
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation e5cdbeab-5b93-42a0-b2cf-163f6eb9e9ed · outbound

This paper cites A hierarchical performance equa- tion library for basic op-amp design,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring A hierarchical performance equa- tion library for basic op-amp design,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.431397Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 11003862-9a1b-4ace-b43e-74f812988c92 · outbound

This paper cites The sizing rules method for analog integrated circuit design,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring The sizing rules method for analog integrated circuit design,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.476978Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation acab7be6-ae47-487d-b78e-8cfc01a04551 · outbound

This paper cites The sizing rules method for CMOS and bipolar analog integrated circuit synthesis,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring The sizing rules method for CMOS and bipolar analog integrated circuit synthesis,

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.421601Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation c7a0bd98-8df2-49bb-8fa1-f33f0fab6666 · outbound

This paper cites OASYS: A framework for analog circuit synthesis,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring OASYS: A framework for analog circuit synthesis,

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.417116Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation a918cec7-3806-48d5-8a7a-35ab14cb1551 · outbound

This paper cites OPASYN: A compiler for CMOS operational amplifiers,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring OPASYN: A compiler for CMOS operational amplifiers,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.407813Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation b3b126cf-69a1-4af8-9bf7-e8dbc75d9b7d · outbound

This paper cites Parasitics- aware framework for integrated OTA sizing and layout synthesis in Fin- FET technologies,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Parasitics- aware framework for integrated OTA sizing and layout synthesis in Fin- FET technologies,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.403059Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 1151ee22-fa55-4e1c-a7a3-35fdcd7c8735 · outbound

This paper cites Analog circuit design optimization based on symbolic simulation and simulated annealing,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Analog circuit design optimization based on symbolic simulation and simulated annealing,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.398809Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 737225fb-fd0f-44bb-b2c3-9792313a8e20 · outbound

This paper cites Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits,

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.394470Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation a82548ac-8bfa-401e-9f57-ea89759ea138 · outbound

This paper cites CMOS op-amp sizing using a geomet- ric programming formulation,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring CMOS op-amp sizing using a geomet- ric programming formulation,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.412517Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 190f365f-25fe-48ce-aa17-a4a63db916bf · outbound

This paper cites GPCAD: A tool for CMOS op-amp synthesis,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring GPCAD: A tool for CMOS op-amp synthesis,

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.465877Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 97fbb418-036a-47a5-87ab-394a78f504ef · outbound

This paper cites Batch Bayesian optimization via multi-objective acquisition ensemble for automated analog circuit design,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Batch Bayesian optimization via multi-objective acquisition ensemble for automated analog circuit design,

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.470245Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 10970dad-2a5d-435f-be7c-f94377513294 · outbound

This paper cites An efficient Bayesian optimization approach for automated optimization of analog circuits,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring An efficient Bayesian optimization approach for automated optimization of analog circuits,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.466911Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation f53f2a31-a4a2-43a2-a837-da94e6907c8c · outbound

This paper cites Local Bayesian optimization for analog circuit sizing,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Local Bayesian optimization for analog circuit sizing,

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.461961Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 0628c59d-c776-4a29-b2be-d52e4c48a226 · outbound

This paper cites tSS-BO: Scalable Bayesian optimization for analog circuit sizing via truncated subspace sampling,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring tSS-BO: Scalable Bayesian optimization for analog circuit sizing via truncated subspace sampling,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.471899Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 45fb34a9-f9e2-4de0-b92e-b3ee416b0504 · outbound

This paper cites An efficient analog circuit sizing method based on machine learning assisted global optimization,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring An efficient analog circuit sizing method based on machine learning assisted global optimization,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.453072Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 53a54d87-31e0-4648-ab45-7856bbd979de · outbound

This paper cites Accelerating OTA circuit design: Transistor sizing based on a transformer model and precomputed lookup tables,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Accelerating OTA circuit design: Transistor sizing based on a transformer model and precomputed lookup tables,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.457538Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 4b074870-b616-4fed-8dcc-ea61f25a7970 · outbound

This paper cites AutoCkt: Deep reinforcement learning of analog circuit designs,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring AutoCkt: Deep reinforcement learning of analog circuit designs,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.400647Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 6112b6ba-9dc1-4dcc-8bfa-2f27e59d2a3b · outbound

This paper cites GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.437702Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation b3e70e89-eb5b-46a9-b1e4-8640d18c9c78 · outbound

This paper cites DNN-Opt: An RL inspired optimization for analog circuit sizing using deep neural networks,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring DNN-Opt: An RL inspired optimization for analog circuit sizing using deep neural networks,

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.444241Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 621bcbd8-3c32-44a4-84ae-b392419754e8 · outbound

This paper cites MA-Opt: Reinforcement learning-based analog circuit optimization using multi-actors,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring MA-Opt: Reinforcement learning-based analog circuit optimization using multi-actors,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.426340Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation f6a6f20b-cde6-4f32-8a1f-f950cadb6355 · outbound

This paper cites AnalogCoder: Analog circuit design via training-free code generation,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring AnalogCoder: Analog circuit design via training-free code generation,

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.475398Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation b29bd0bc-9643-4a5a-84f0-1e2c053bfdab · outbound

This paper cites ADO-LLM: Analog design Bayesian optimization with in-context learning of large language models,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring ADO-LLM: Analog design Bayesian optimization with in-context learning of large language models,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.461641Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 1f7577e3-ef53-4a15-a57a-6b14ea9d0d5d · outbound

This paper cites LEDRO: LLM-enhanced design space reduction and optimization for analog circuits,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring LEDRO: LLM-enhanced design space reduction and optimization for analog circuits,

Reference 23

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.492217Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 84621e82-48c3-4bd2-8811-be8794d24a67 · outbound

This paper cites AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring AmpAgent: An LLM-based Multi-Agent System for Multi-stage Amplifier Schematic Design from Literature for Process and Performance Porting

Reference 24

Resolution: unresolved; no resolver link, observed 2026-07-11T04:14:48.006637Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation f88b1f0e-1c69-495b-a622-d37958c07cdc · outbound

This paper cites Ar- tisan: Automated operational amplifier design via domain-specific large language model,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Ar- tisan: Automated operational amplifier design via domain-specific large language model,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.488259Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation cd1d3473-c482-4677-a876-44d7c5fbde7d · outbound

This paper cites Atelier: An automated analog circuit design framework via multiple large language model-based agents,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Atelier: An automated analog circuit design framework via multiple large language model-based agents,

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.423250Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 439f73e2-9788-4c83-8c04-4296540b9c28 · outbound

This paper cites GANA: Graph convolutional network based automated netlist annotation for analog circuits,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring GANA: Graph convolutional network based automated netlist annotation for analog circuits,

Reference 27

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.418933Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation e81276e7-035e-4a67-8dba-fc685815ee9f · outbound

This paper cites GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification

Reference 28

Resolution: verified exact; local_arxiv, observed 2026-07-11T04:17:45.836588Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 00c1012f-e41a-45a6-ba55-607a0b43d92b · outbound

This paper cites Retrieval-augmented generation for knowledge-intensive NLP tasks,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Retrieval-augmented generation for knowledge-intensive NLP tasks,

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.427852Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation af451d24-576a-4aca-9a45-fffdcc11c142 · outbound

This paper cites Jespers and B.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Jespers and B

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.505629Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 26875de3-801c-4e2c-9ecc-7e9acbb18eed · outbound

This paper cites Ag m/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Ag m/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA,

Reference 31

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.494327Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 52c443ba-2078-4032-bf96-21ef6a3aab0d · outbound

This paper cites GPT-5.2 model,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring GPT-5.2 model,

Reference 32

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.410214Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 298ad98d-24cc-4334-85c8-f7cc577d3a76 · outbound

This paper cites Weisfeiler-Lehman graph kernels,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring Weisfeiler-Lehman graph kernels,

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.404978Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation f57318b9-512b-47d5-8cfb-b1e2197dec31 · outbound

This paper cites ´Etude comparative de la distribution florale dans une portion des alpes et des jura,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring ´Etude comparative de la distribution florale dans une portion des alpes et des jura,

Reference 34

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.437452Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 7c11a77f-478c-4178-976f-2b8ab6f73952 · outbound

This paper cites EEschematic: Multimodal-LLM based AI agent for schematic generation of analog circuit,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring EEschematic: Multimodal-LLM based AI agent for schematic generation of analog circuit,

Reference 35

Resolution: verified exact; arxiv_id, observed 2026-07-11T04:17:45.824200Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 5982056c-e329-4ed3-a19d-2da799a70506 · outbound

This paper cites ALIGN: Open- source analog layout automation from the ground up,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring ALIGN: Open- source analog layout automation from the ground up,

Reference 36

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.414687Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Observation 4cd327ea-eea4-47af-a22e-908a242bf14b · outbound

This paper cites ALIGN: Analog Layout, Intelligently Generated from Netlists,.

NEMESIS: NEtlist-Driven Modeling and Equation Synthesis with Inversion-Aware SPICE Anchoring ALIGN: Analog Layout, Intelligently Generated from Netlists,

Reference 37

Resolution: verified fuzzy; raw_fallback, observed 2026-07-11T04:17:46.432224Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.

Pith citing papers

No inbound Pith citation observations are available.