Paper Citation Record · LEDGER

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal

As of 6 August 2026, this Paper Citation Record lists 48 of 48 outbound references and 0 inbound Pith citation observations for arXiv:2608.01045.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2608.01045 v1

Coverage vector

measured 48 of 48 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-06T00:38:39.566853Z

measured 48 of 48 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-06T06:34:29.942622+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

48 of 48 outbound references displayed

verified exact3
verified fuzzy42
unresolved3
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation fa373513-0689-4e03-8ea5-3f144665e254 · outbound

This paper cites Part 4: The 2020 wilson research group functional verifi- cation study.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Part 4: The 2020 wilson research group functional verifi- cation study

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:54.419756Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 10655d17-6c38-4ae3-9645-5efccd242e94 · outbound

This paper cites Part 8: The 2022 wilson research group functional verifi- cation study.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Part 8: The 2022 wilson research group functional verifi- cation study

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:54.103385Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 2cde8fd6-d418-4127-88b5-1312b877a65b · outbound

This paper cites Gem: Gpu-accelerated emulator-inspired rtl simulation.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Gem: Gpu-accelerated emulator-inspired rtl simulation

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:53.775963Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 774f7270-3a29-430b-a458-31c39e4967b4 · outbound

This paper cites Difuzzrtl: Differential fuzz testing to find cpu bugs.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Difuzzrtl: Differential fuzz testing to find cpu bugs

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:53.455235Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 66a41693-6e5c-435f-9031-32fca5b0b4d1 · outbound

This paper cites Rfuzz: Coverage-directed fuzz testing of rtl on fpgas.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Rfuzz: Coverage-directed fuzz testing of rtl on fpgas

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:53.154182Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation acfa46fc-f216-4fe8-99a6-5667ba37c5a1 · outbound

This paper cites Fuzzing hardware like software.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Fuzzing hardware like software

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:52.853234Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation cdecd786-2234-44de-afa6-49439444bf30 · outbound

This paper cites Fuzzbtor2: A random generator of word-level model checking problems in btor2 format.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Fuzzbtor2: A random generator of word-level model checking problems in btor2 format

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:52.541063Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 9151193b-9234-4179-9915-8f4a39b6300b · outbound

This paper cites Wasim: A word-level abstract symbolic simula- tion framework for hardware formal verification.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Wasim: A word-level abstract symbolic simula- tion framework for hardware formal verification

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:52.227025Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 9e8d8297-6516-4d48-a17b-0d5167334af5 · outbound

This paper cites Deeply optimizing the sat solver for the ic3 algorithm.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Deeply optimizing the sat solver for the ic3 algorithm

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:51.854153Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation ea38c4b5-d006-460d-8fd8-2a2b05e068b3 · outbound

This paper cites Symbolic model checking without bdds.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Symbolic model checking without bdds

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:51.503840Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation ba8755ce-fb31-426d-b474-d275a8f38684 · outbound

This paper cites Efficient implementation of property directed reachability.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Efficient implementation of property directed reachability

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:51.252894Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 2f9c4b4d-d148-4bb5-b5a1-ebfa12fcfc54 · outbound

This paper cites Automatic verification of finite-state concurrent systems using temporal logic specifications.ACM Transactions on Programming Languages and Systems (TOPLAS), 8(2):244–263, 1986.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Automatic verification of finite-state concurrent systems using temporal logic specifications.ACM Transactions on Programming Languages and Systems (TOPLAS), 8(2):244–263, 1986

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:50.964877Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation dd83b9af-00b0-4e34-87ed-a8b2e4557b56 · outbound

This paper cites Model checking.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Model checking

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-06T00:38:34.912858Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 61858560-13bd-47f8-bec7-32d58d8c45b1 · outbound

This paper cites Handbook of model checking, volume 10.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Handbook of model checking, volume 10

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:50.597941Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 818aba34-79f6-433c-bf89-780ce6256c46 · outbound

This paper cites A survey of symbolic execution techniques.ACM Computing Surveys (CSUR), 51(3):1–39, 2018.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal A survey of symbolic execution techniques.ACM Computing Surveys (CSUR), 51(3):1–39, 2018

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:50.219018Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 90d37344-9417-4e79-93e7-dcb661da5660 · outbound

This paper cites En- hancing symbolic execution with veritesting.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal En- hancing symbolic execution with veritesting

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:49.964976Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 898cfa9a-d976-4766-9cd5-e3e846dc29ff · outbound

This paper cites Satisfiability modulo theories.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Satisfiability modulo theories

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:49.749583Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 17106241-f763-42c0-91ce-f9d4021d0030 · outbound

This paper cites Processor verification using symbolic execution: A risc-v case-study.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Processor verification using symbolic execution: A risc-v case-study

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:49.425626Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 9de9eaa2-ab04-4e5f-acde-04164e12473d · outbound

This paper cites Verilator and systemperl.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Verilator and systemperl

Reference 19

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:49.124220Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 8cb42df1-d484-477d-b618-bf6fa735766c · outbound

This paper cites Klee: unassisted and automatic generation of high-coverage tests for complex systems programs.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Klee: unassisted and automatic generation of high-coverage tests for complex systems programs

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-06T00:38:35.891350Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fd019cc1-76e9-46e2-a09d-4c0564d8ab01 · outbound

This paper cites Symbolic trajectory evaluation.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Symbolic trajectory evaluation

Reference 21

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:48.855605Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 2a2fff5d-312c-4c2a-a2f1-53f93623cb3f · outbound

This paper cites Replacing testing with formal verification in intel coretm i7 processor execution engine validation.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Replacing testing with formal verification in intel coretm i7 processor execution engine validation

Reference 22

Resolution: verified exact; doi, observed 2026-08-06T00:38:39.858690Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 6ce65691-7e67-417f-bbac-8e97043418e5 · outbound

This paper cites an unresolved cited work.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Unresolved cited work

Reference 23

Resolution: verified exact; arxiv_id_nonexistent, observed 2026-08-06T00:38:41.401563Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation eea240c3-a0bb-4d97-9c20-d86dd15fe281 · outbound

This paper cites an unresolved cited work.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Unresolved cited work

Reference 24

Resolution: unresolved; raw_fallback, observed 2026-08-06T00:38:48.573248Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 0015893c-fad8-4f96-a583-196b5d7a22ca · outbound

This paper cites Picker: A multilingual verification tool for hardware design and validation.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Picker: A multilingual verification tool for hardware design and validation

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:48.301089Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation d3439c13-0e19-4428-b802-083730cb585a · outbound

This paper cites Cocotb: a python-based digital logic verification frame- work.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Cocotb: a python-based digital logic verification frame- work

Reference 26

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:47.976685Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 00a01306-4b89-48c2-a712-ff60201f44d3 · outbound

This paper cites Smt- sweep: Word-level representation unification for hardware verification, 2025.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Smt- sweep: Word-level representation unification for hardware verification, 2025

Reference 27

Resolution: verified exact; arxiv_id, observed 2026-08-06T00:38:40.955413Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation cdda8399-2a77-4736-afcf-6786a5e97e17 · outbound

This paper cites Goldmine: Automatic assertion generation using data mining and static analysis.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Goldmine: Automatic assertion generation using data mining and static analysis

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:47.665486Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 153acccc-9df1-4bbf-886a-04e79d75552f · outbound

This paper cites The seahorn verification framework.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal The seahorn verification framework

Reference 29

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:47.417211Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation e9e35011-79b2-4bb8-a425-aae82bb82932 · outbound

This paper cites Program verification with constrained horn clauses.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Program verification with constrained horn clauses

Reference 30

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:47.144036Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation b4b43239-cda1-4735-a074-2cdf00b23a42 · outbound

This paper cites Symbolic quick error detection using symbolic initial state for pre-silicon verification.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Symbolic quick error detection using symbolic initial state for pre-silicon verification

Reference 31

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:46.822244Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 0f6153fe-6cf0-41d9-acd7-0ccd15ac8a94 · outbound

This paper cites Smt-switch: a solver-agnostic c++ api for smt solving.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Smt-switch: a solver-agnostic c++ api for smt solving

Reference 32

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:46.531511Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 8fb31af3-5374-4a15-bb7e-f1ea7c27e513 · outbound

This paper cites Bitwuzla.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Bitwuzla

Reference 33

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:46.338625Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation bf21b272-d63c-4e7b-8ce7-e49cba31b3cf · outbound

This paper cites Btor2, btormc and boolector 3.0.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Btor2, btormc and boolector 3.0

Reference 34

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:46.048911Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 3b4b0aa0-55df-4f9c-960d-8586022c8ae7 · outbound

This paper cites Yosys-a free Verilog synthesis suite.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Yosys-a free Verilog synthesis suite

Reference 35

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:45.796463Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 78464474-9f00-416a-b7c3-eba4da65ae9d · outbound

This paper cites Icarus verilog: open-source verilog more than a year later.Linux Journal, 2002(99):3, 2002.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Icarus verilog: open-source verilog more than a year later.Linux Journal, 2002(99):3, 2002

Reference 36

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:45.492347Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 1383b062-1590-4c23-a2a4-cb79d51fad86 · outbound

This paper cites Hardware-implementation-of-aes-verilog.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Hardware-implementation-of-aes-verilog

Reference 37

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:45.159065Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation a4d3f66d-d2c6-42aa-9347-50798e94c64b · outbound

This paper cites Asanovic et al.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Asanovic et al

Reference 38

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:44.862739Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 687ebe1d-4a09-4dc6-b2a7-c8eaef78454b · outbound

This paper cites Piccolo: Risc-v cpu, simple 3-stage pipeline, for low-end applica- tions.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Piccolo: Risc-v cpu, simple 3-stage pipeline, for low-end applica- tions

Reference 39

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:44.495075Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation b6e3d748-e960-41b6-b233-044f9246fcae · outbound

This paper cites Flute: Risc-v cpu, simple 5-stage in-order pipeline.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Flute: Risc-v cpu, simple 5-stage in-order pipeline

Reference 40

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:44.186324Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 42fdf5e8-2381-474d-9fbc-6dfd5e30c10a · outbound

This paper cites Ridecore: Risc-v dynamic execution core, an out-of-order risc-v proces- sor written in verilog hdl.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Ridecore: Risc-v dynamic execution core, an out-of-order risc-v proces- sor written in verilog hdl

Reference 41

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:43.958002Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 70c607f0-e40d-48f1-a248-8725ca2865da · outbound

This paper cites OR1200 source code, 2020.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal OR1200 source code, 2020

Reference 42

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:43.622649Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 72020983-da14-4e23-96a2-a9012c001474 · outbound

This paper cites Characteristics of the itc’99 benchmark circuits.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Characteristics of the itc’99 benchmark circuits

Reference 43

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:43.330977Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation f30752a9-3465-4c4b-895a-273c383eff1d · outbound

This paper cites Pono: a flexible and extensible smt-based model checker.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Pono: a flexible and extensible smt-based model checker

Reference 44

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:42.986510Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 0719f1ad-4495-4a58-bfb2-1c46d1d514b4 · outbound

This paper cites Kroening and M.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Kroening and M

Reference 45

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:42.621421Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation c81ac33c-56be-4dab-b151-9c077ffa7ece · outbound

This paper cites Stsearch: State tracing-based search heuristics for rtl validation.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Stsearch: State tracing-based search heuristics for rtl validation

Reference 46

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:42.305065Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 13f64132-d978-478c-bde5-66c36d60e75c · outbound

This paper cites Hot-fv: A semi-formal test generation framework for rtl functional coverage using warm starting states.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal Hot-fv: A semi-formal test generation framework for rtl functional coverage using warm starting states

Reference 47

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:42.027396Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Observation 72a12c9e-b2d8-4a49-a4a0-344dcf0c3826 · outbound

This paper cites MicroRV32.

Forbench: Symbolic Simulation Helps Make Your Testbench More Formal MicroRV32

Reference 48

Resolution: verified fuzzy; raw_fallback, observed 2026-08-06T00:38:41.681605Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-06T06:34:29.942622+00:00.

Pith citing papers

No inbound Pith citation observations are available.