Travel Time Based Task Mapping for NoC-Based DNN Accelerator

Wenyao Zhu; Yizhi Chen; Zhonghai Lu

REVIEW 4 major objections 6 minor 22 references

Travel Time Based Task Mapping for NoC-Based DNN Accelerator

T0 review · 4 major / 6 minor · reviewed 2026-08-12 · deepseek-v4-flash

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Pith's one-line read This paper claims that assigning DNN tasks to NoC processing elements in proportion to measured travel time—rather than evenly or by distance—balances workload and cuts single-layer latency by up to 12.1% and whole-model latency by 8.17%…

desk verdict A practical, incremental runtime mapping heuristic for NoC-based DNN accelerators; the simulator results are consistent, but the load-bearing stationarity assumption needs explicit validation before I'd trust the numbers. read the letter →

arxiv 2411.12710 v1 pith:2OJDJMDS submitted 2024-11-19 cs.AR

Yizhi Chen , Wenyao Zhu , Zhonghai Lu This is my paper · ORCID

classification cs.AR

keywords taskmappingnetwork-on-chipDNNacceleratorloadbalancingtraveltimesamplingwindowlatencyreductionconvolutionalneuralnetwork

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Network-on-chip based DNN accelerators typically assign the same number of convolution tasks to every processing element, ignoring that PEs sit at different distances from memory and face different congestion. This paper proposes instead to allocate task counts in inverse proportion to each PE's observed travel time—the time for a request to reach memory, fetch the data, return, and compute—so that task count times travel time is roughly equal across PEs. The rebalancing is done at runtime by sampling travel times over a short window and then reassigning only the remaining tasks. In simulation, the method reduces single-layer latency by up to 12.1% compared with even and distance-based mapping, and whole-model latency by 8.17% with a ten-task sampling window, approaching the 10.37% gain of an ideal post-run mapping that uses exact travel times. The paper argues that because DNN tasks repeat similar patterns, a short sampling window is enough to capture the meaningful differences between PEs.

What carries the argument

The load-bearing rule is the equalization identity $T_{\mathrm{askcount}}\_i \cdot T_{\mathrm{travel}}\_i = \mathrm{constant}$ (Eq.~4), solved together with the total-task constraint to yield per-PE task counts. For runtime operation, the paper replaces the unmeasured exact travel time with a sampled time $T_s$ from a short sampling window and rebalances only the residual tasks (Eqs.~7--8). The travel-time decomposition $T_{\mathrm{travel}} = T_{\mathrm{req}} + T_{\mathrm{mem\_access}} + T_{\mathrm{resp}} + T_{\mathrm{comp}}$ is the mechanism that makes one scalar per PE encode both architecture and congestion. The sampling-window length is the trade-off knob: whole-model improvement grows from 1.78% (window 1) to 8.17% (window 10), approaching the post-run ideal of 10.37%.

What would settle it

Run the sampling-window method on a NoC trace with bursty, non-stationary traffic, such as varying batch sizes or interleaved models, and compare each PE's final completion time against the equalized target. If the post-mapping unevenness significantly exceeds the 5.81% reported, or the whole-model speedup over row-major mapping drops below 8.17%, the stationarity assumption has failed. A direct check is to compare the travel-time ratios measured in the sampling window with those measured after reallocation: a large divergence means the mapping rule is chasing a moving target.

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Extended reading notes

Core claim

The central discovery is that the per-PE travel time, $T_{\mathrm{travel}} = T_{\mathrm{req}} + T_{\mathrm{mem\_access}} + T_{\mathrm{resp}} + T_{\mathrm{comp}}$, is a sufficient statistic for allocating convolution tasks in a NoC-based DNN accelerator. Allocating task counts so that $T_{\mathrm{askcount}}\_i \times T_{\mathrm{travel}}\_i$ is constant across PEs (Eq.~4) nearly equalizes per-PE completion times, cutting the unevenness of per-task completion time from 22.09% under row-major mapping to 5.81% under the proposed mapping. The method works because travel time implicitly encodes both the static NoC topology (distance to memory controllers) and dynamic congestion, which pure distance-based or static-latency mappings miss. A runtime sampling window of ten tasks achieves 8.17% whole-model improvement, while a post-run mapping using exact recorded travel times achieves 10.37%, both relative to row-major mapping; the gap reflects that sampled travel times are only approximations of the true post-reallocation values.

Load-bearing premise

The load-bearing premise is that the travel time measured on a PE before reallocation remains valid after tasks are repartitioned, even though network congestion depends on the mapping itself; if travel times shift substantially after rebalancing, the equalization is miscalibrated and the reported gains degrade.

Editorial extensions

If this is right

A layer's completion time is set by its slowest PE, so cutting per-PE unevenness from 22.09% to 5.81% yields latency improvements of 9.7% to 12.1% across the tested mapping iterations, packet sizes, and NoC topologies.
Because the method needs no extra run and only a short sampling window, it can be applied on the fly during inference, with window length as a tunable knob: longer windows give better approximations but require more samples before rebalancing.
The benefit shrinks when the NoC has more memory controllers: with four MCs the improvement drops to 5.6% because the distance variance between PEs is smaller, leaving less room for rebalancing.
A post-run mapping that uses exact travel times is the upper bound of what any runtime estimator can achieve, so the 10.37% figure bounds the potential of sampling-based approaches for this architecture.
Distance-based mapping can sometimes be worse than even mapping, showing that static topology information alone is insufficient; only travel time that includes dynamic congestion captures the true cost.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

The stationarity assumption—that travel times measured under the current mapping remain valid after tasks are reallocated—is the fragile point: if congestion shifts substantially after rebalancing, the equalization is miscalibrated. The paper's own 8.17% versus 10.37% gap is a partial measure of this effect.
The method is designed for the regular, repetitive traffic of CNN layers, which the paper notes makes predictions accurate. A testable extension is applying it to transformer or attention workloads whose communication patterns are input-dependent; the sampling window may need to be much longer or adaptive there.
The residual-task rebalancing means the benefit scales with layer size: small layers like the 84-packet layer already show degradation at short windows, so for tiny layers a fully static mapping or a post-run approach would be preferable—a policy the paper only implicitly hints at.
The post-run ideal could be approached at runtime by predicting congestion-aware travel times (e.g., from queue occupancy) rather than purely sampling history; a longer window only averages the past, it does not anticipate the future.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

The short version: this is a solid, incremental paper. The new part is using a short sampling window to measure per-PE travel times during a run, then allocating remaining tasks inversely proportional to those times. That is simple and genuinely useful. On their simulator it beats row-major and distance-based mapping across the tested configurations, cutting unevenness from ~22% to ~6% and improving whole-LeNet latency by 8.17% with a sampling window of 10, close to the 10.37% post-run ideal.

What the paper does well: the problem is clearly motivated, the method is easy to understand, and the evaluation covers meaningful axes — mapping iterations, packet size, and NoC architecture. The authors are honest about the trade-off between sampling window length and accuracy, and they show that a too-small window can hurt. The comparison to static-latency mapping is useful: it demonstrates why purely analytical estimates fail once congestion matters. The paper is written plainly and does not oversell itself except for a slightly confusing abstract where the post-run numbers are listed before the runtime ones.

The soft spot, and it is load-bearing: Eq. (4) assumes the travel time measured under the current mapping stays valid after tasks are reallocated. But travel time includes queuing and congestion, which depend on where the traffic is injected. If moving tasks to faster PEs congests those paths, the equalization is miscalibrated. The paper does not check whether the sampled travel times actually match what PEs experience after remapping. The gap between the 8.17% sampled result and the 10.37% post-run ideal could be sampling noise, but it could also be exactly this miscalibration. This is not fatal — the post-mapping unevenness of 5.81% suggests the approximation held in their configurations — but it needs a direct test. A simple experiment measuring travel times after remapping and comparing them to the sampled values would settle it.

Smaller issues: baselines are only row-major and distance-based; no comparison with work-stealing or other adaptive heuristics, which the authors acknowledge as future work. The simulator results have no error bars or repeated-run statement, though a cycle-accurate simulator is likely deterministic. No code or data is released, so reproducibility is limited to what is in the paper.

Overall: this deserves a serious referee. The idea is practical, the experiments are reasonably thorough, and the stationarity assumption is the one thing I would want pinned down before publication. If that check passes, this is a citable engineering contribution for NoC-based DNN accelerators.

Referee Report

4 major / 6 minor

Summary. The paper proposes a travel-time-based task mapping method for NoC-based DNN accelerators. Instead of assigning equal task counts, it allocates tasks to PEs in inverse proportion to measured per-task travel time (Eq. 4), so that each PE's total time is roughly equalized. The travel time includes request, memory-access, response, and computation components (Eq. 3). To avoid an extra run, the authors sample travel times during runtime using a sampling window (Eqs. 7-8) and apply the resulting ratios to residual tasks. Experiments on a cycle-accurate simulator compare against row-major and distance-based mappings across mapping iterations, packet sizes, and two NoC architectures, reporting improvements up to 12.1% for a single layer and 8.17% for the full LeNet with sampling window 10, versus 10.37% for post-run ideal mapping.

Significance. The work addresses a practical problem and has some strengths: it targets a real bottleneck (load imbalance in NoC-based accelerators), introduces a simple runtime-sampling mechanism that avoids an extra execution, and evaluates over multiple configurations including different architectures. The simulator results consistently show improvements over both baselines. However, the central equalization rule is a heuristic whose optimality is not derived, and the key stationarity assumption—that travel times remain valid after task reallocation—is not validated. The reported gains are plausible but not yet robustly supported. No code or artifacts are provided, so reproducibility relies on the textual description.

major comments (4)

[§4.2, Eqs. (4) and (7)-(8)] The mapping rule assumes each PE's total time equals Taskcount * Ttravel and that Ttravel is independent of the task allocation. However, Ttravel in Eq. (3) contains Treq and Tresp, which include NoC queuing and congestion delays, and these depend on how many tasks each PE injects and where the traffic goes. After reallocating tasks toward low-travel-time PEs, those PEs inject more traffic and the shared memory controllers and routers experience different load, so the per-PE travel-time vector can shift. The paper never reports a check comparing the Ttravel values used in Eq. (4)/(7) with the travel times actually experienced after remapping. I request such a validation (e.g., a table or scatter plot of predicted vs. actual per-PE completion times) or a sensitivity analysis that perturbs the travel-time vector; without this, the 8.17% whole-LeNet improvement is not established as a stable property of the method.
[§5.6] The gap between the sampling-window result (8.17%) and the post-run result (10.37%) is attributed to sampling noise, but it could equally reflect a systematic bias from using travel times measured under the old mapping. A concrete way to separate these effects is to run the sampling-window algorithm with increasing window sizes and check whether the improvement saturates at 10.37% or at a lower value; the paper currently tests only windows 1, 5, and 10, which is insufficient to distinguish the two hypotheses.
[§5.1 and §5.6] All reported numbers appear to come from a single simulation run per configuration, and no error bars, confidence intervals, or seed variations are provided. Since the claimed improvements (8-12%) are modest and the paper is about congestion-dependent behavior, the results need to be shown to be stable across repeated runs (or the simulator's determinism must be justified). This is required before the quantitative headline claims can be accepted.
[§4.2, Eq. (4)] The statement that 'ideally, the overall latency is balanced' by Eq. (4) is asserted rather than derived. Equalizing Taskcount * Ttravel per PE is a plausible load-balancing heuristic, but it is not obviously optimal for makespan on a shared NoC, where interactions between PEs matter. Please either provide a derivation or explicitly frame the method as a heuristic; the word 'ideal' for post-run mapping in §5.6 and the abstract should be adjusted accordingly.

minor comments (6)

[Abstract] The sentence 'For a complete NN example, our method achieves 10.37% and 13.75% overall improvements...' is confusing because 10.37% is later identified as the post-run (ideal) result, while the runtime sampling-window result is 8.17%. Please attribute the numbers to the correct variants.
[§3.3, Eq. (1)] The distance values are labels (1, 2, 3), not continuous variables; the notation 'Taskcount1 * Distance1 = ...' should be explained more explicitly to avoid implying that Distance is a numeric multiplier.
[§5.2] The text 'Nodes 13, 5, and 8 are the fastest as they have only one distance' should read 'distance 1'; also, the subfigures of Fig. 7 are not individually referenced in the text, making it hard to map the discussion to the panels.
[§5.4 and §5.6] Numbers such as 'up to 12.1%' for one layer, '9.7%' for mapping iterations, and '8.17%' for the whole LeNet should be cross-checked for consistency with figures; there is no table summarizing all results, which would help.
[§4.1-4.2] The paper would benefit from a notation table or glossary for Ttravel, Ts, Taskcount, and SamplingWindowLength; these are introduced across Sections 4.1-4.2 and used later without restatement.
[General] Minor language issues: 'the travel time recorded in the sampling window' and 'sampling window 10' are used interchangeably; choose one phrasing consistently.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: travel-time task counts are a heuristic equalization rule, and the reported latency improvements are independent simulation outcomes.

full rationale

The paper's derivation chain is self-contained as an empirical evaluation. Eq. (4) and Eqs. (7)-(8) define a mapping rule: task counts are chosen so that count times measured travel time is approximately equal; this is a heuristic control law, not a quantity whose definition already contains the reported latency. The reported gains (up to 12.1% per layer, 8.17% for sampling-window LeNet, 10.37% post-run) are obtained by cycle-accurate simulation after applying the resulting counts, and no free parameter is fitted to maximize these percentages. The sampling-window vs. post-run comparison is a genuine finite-sample approximation study. The main limitation—travel time measured under the initial mapping may change after reallocation because congestion is mapping-dependent—is an untested stationarity assumption and a robustness concern, not a circular reduction: Eq. (3) does not define Ttravel in terms of the final task counts, and the evaluation does not assume the gain. Self-citations ([20], [22]) are used only for simulation infrastructure or as contextual architecture references and are not load-bearing for the central claim. No equation reduces to its own input, so the paper receives score 0.

Assumptions & free parameters 1 free parameters · 3 assumptions · 0 invented entities

The central claim rests on one hyperparameter (sampling window length) and three domain assumptions: additivity of per-PE task time, stationarity of measured travel times after re-mapping, and simulator fidelity. No fitted constants are used to generate the headline numbers, and no new entities are introduced.

free parameters (1)

sampling_window_length = 10 (default); 1, 5, 10 explored
The runtime method samples travel time for a user-chosen number of tasks per PE before allocating residual tasks. Window length is a hand-set hyperparameter, not optimized on the test result, but it directly controls the accuracy of the travel-time estimate and the reported 8.17% improvement.

assumptions (3)

domain assumption Per-PE total time is approximately n_i * Ttravel_i, so equalizing Ttravel_i * n_i equalizes completion times (Eqs. (4), (7)).
This ignores inter-task pipelining, overlap between request/result packets, and the fact that congestion and hence Ttravel_i depends on the mapping itself. It is the mathematical core of the mapping rule and is asserted, not derived.
domain assumption Travel times measured in the sampling window under the initial mapping are representative of travel times of residual tasks after reallocation.
The sampling-window method (Section 4.2, Eqs. (7)-(8)) uses sampled Ts to compute residual task counts; if the NoC state changes after re-mapping, the sampled times lose validity. The gap between 8.17% and 10.37% shows this assumption is only approximately true.
domain assumption The cycle-accurate simulator based on Gem5-Garnet faithfully models the target NoC behavior.
All numerical claims come from simulation (Section 5.1); no silicon validation is provided, so results could change on real hardware.

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Cite this review

Pith. "Pith review of Travel Time Based Task Mapping for NoC-Based DNN Accelerator." pith.science (2026). https://pith.science/paper/2OJDJMDS

@misc{pith2026241112710,
  author       = {Pith},
  title        = {Pith review of: Travel Time Based Task Mapping for NoC-Based DNN Accelerator},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/2OJDJMDS}},
  note         = {Machine review of arXiv:2411.12710}
}

read the original abstract

Network-on-Chip (NoC) based architectures are recently proposed to accelerate deep neural networks in specialized hardware. Given that the hardware configuration is fixed post-manufacture, proper task mapping attracts researchers' interest. We propose a travel time-based task mapping method that allocates uneven counts of tasks across different Processing Elements (PEs). This approach utilizes the travel time recorded in the sampling window and implicitly makes use of static NoC architecture information and dynamic NoC congestion status. Furthermore, we examine the effectiveness of our method under various configurations, including different mapping iterations, flit sizes, and NoC architecture. Our method achieves up to 12.1% improvement compared with even mapping and static distance mapping for one layer. For a complete NN example, our method achieves 10.37% and 13.75% overall improvements to row-major mapping and distance-based mapping, respectively. While ideal travel time-based mapping (post-run) achieves 10.37% overall improvements to row-major mapping, we adopt a sampling window to efficiently map tasks during the running, achieving 8.17% (sampling window 10) improvement.

Figures

Figures reproduced from arXiv: 2411.12710 by the authors.

**Figure 2.** Even mapping However, even mapping lacks sensitivity to crucial information such as NoC architecture, and the real-time status of network congestion. 3.3 Distance-Based Task Mapping To utilize the NoC architecture information, we explore the mapping according to different distances to memory nodes. A node is categorized as "distance 1" if it directly surrounds an MC node, as shown in [PITH_FULL_IMAGE:figures/full_f… view at source ↗

**Figure 3.** Distance-based mapping 4 Travel time Based Mapping Approach We propose a travel time based mapping strategy for determining task allocation ratios in various scenarios. We explore the use of static latency, post-run recorded latency, and run-time travel time within a sampling window. 4.1 Travel Time As shown in [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗

Figures from the paper (8 more)

**Figure 4.** Figure 4: Travel time in NoC [PITH_FULL_IMAGE:figures/full_fig_p005_4.png]

**Figure 5.** Figure 5: Travel time based mapping Post-run Travel Time Based Mapping Travel time is precisely recorded during a complete run, and mapping is performed afterward. This method yields accurate travel time data for use in Eq. (4), but necessitates an additional run. Sampling Windo…

**Figure 6.** Figure 6: Flowchart of travel time based task mapping with sampling window [PITH_FULL_IMAGE:figures/full_fig_p008_6.png]

**Figure 7.** Figure 7: Results of unevenness (a)Average results for row-major mapping [PITH_FULL_IMAGE:figures/full_fig_p010_7.png]

**Figure 8.** Figure 8: Different mapping iterations Our proposed travel time mapping significantly narrows the gap between the low bar and high bar in the same mapping method from 21.2% to around 5%. Compared with row-major mapping, the total time consumed for processing a single layer is do…

**Figure 9.** Figure 9: Inference time for one layer with varying kernel size and packet size [PITH_FULL_IMAGE:figures/full_fig_p012_9.png]

**Figure 10.** Figure 10: Results of different NoC architectures with sampling windows of 1, 5, and 10, alongside the post-run travel time based mapping. The percentage improvements over row-major mapping, for each cluster, are also presented in polylines, offering a comprehensive comparison …

**Figure 11.** Figure 11: Inference time for LeNet When comparing different mapping methods, with row-major mapping serving as the baseline, distance-based mapping sometimes outperforms and at other times gets worse results than row-major mapping across different layers. Static latency based …

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Reviewed August 12, 2026 · model on record in the stance chip above.

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