Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
As of 7 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 5 inbound Pith citation observations for arXiv:2504.17226.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-07T06:34:17.273281+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-06T22:55:09.370121Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-11T18:31:13.612838Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation aa4b6cb0-fa18-42a0-80e8-360fa55de017 · inbound
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models cites this paper.
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
Reference 76
- Resolution
- unresolved
- no resolver link, observed 2026-08-06T22:55:09.370121Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 53b3ce17-5f41-4a04-a7b4-0006de14dfd0 · inbound
Automated LTL Specification Generation from Industrial Aerospace Requirements cites this paper.
Automated LTL Specification Generation from Industrial Aerospace Requirements FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
Reference 34
- Resolution
- verified exact
- arxiv_id, observed 2026-05-10T03:14:07.856321Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.
Observation 0ac62f0d-55ed-45b8-8d77-35d1039b3a5a · inbound
Autoformalizing Memory Specifications with Agents cites this paper.
Autoformalizing Memory Specifications with Agents FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
Reference 37
- Resolution
- verified exact
- arxiv_id, observed 2026-05-11T15:01:06.440287Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.
Observation 67825b71-ba5a-4694-9a55-4e2d362c26e0 · inbound
UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification cites this paper.
UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
Reference 36
- Resolution
- verified exact
- arxiv_id, observed 2026-05-11T18:31:13.617512Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-07T06:34:17.273281+00:00.
Observation 4b7b053e-0cfa-4452-8f59-ec94ff23be2f · inbound
CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation cites this paper.
CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols
Reference 28
- Resolution
- unresolved
- no resolver link, observed 2026-08-01T01:40:57.849628Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.