Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Sparse Systolic Tensor Array for Efficient CNN Hardware Acceleration
As of 23 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2009.02381.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-22T06:32:14.747728+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-09T00:58:08.237976Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-09T00:58:11.602186Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 70eb104b-f5d6-41cb-98ca-492b078a4f33 · inbound
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration cites this paper.
Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration Sparse Systolic Tensor Array for Efficient CNN Hardware Acceleration
Reference 55
- Resolution
- metadata mismatch
- local_arxiv, observed 2026-08-09T00:58:11.607742Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-22T06:32:14.747728+00:00.