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Performance of FPGA controller in ISAC-1 accelerator chain

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arxiv 2310.11735 v2 pith:4OXPKH6X submitted 2023-10-18 physics.acc-ph

classification physics.acc-ph
keywords controlphaseacceleratoramplitudecontrollerfpgafrequencygeneration
verification ladder T0 review T1 audit T2 compute T3 formal
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The LLRF of five of TRIUMF's ISAC-1 accelerator cavities have been replaced by 3 similar FPGA based system with different operating frequencies. These LLRF use internal digital phase locked loops for frequency generation and synchronization, feedback control using Amplitude/Phase regulations. These FPGAs also have internal stepper motor controller for resonance control. Various modes of resonance control are possible, including phase comparison and minimum seeking slide-mode control. Operational performances including frequency generation and synchronization, amplitude and phase noises, tuning speeds, compatibility to original remote controls, are reported.

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