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A Compact Model for Scalable MTJ Simulation
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This paper presents a physics-based modeling framework for the analysis and transient simulation of circuits containing Spin-Transfer Torque (STT) Magnetic Tunnel Junction (MTJ) devices. The framework provides the tools to analyze the stochastic behavior of MTJs and to generate Verilog-A compact models for their simulation in large VLSI designs, addressing the need for an industry-ready model accounting for real-world reliability and scalability requirements. Device dynamics are described by the Landau-Lifshitz-Gilbert-Slonczewsky (s-LLGS ) stochastic magnetization considering Voltage-Controlled Magnetic Anisotropy (VCMA) and the non-negligible statistical effects caused by thermal noise. Model behavior is validated against the OOMMF magnetic simulator and its performance is characterized on a 1-Mb 28 nm Magnetoresistive-RAM (MRAM) memory product.
Forward citations
Cited by 2 Pith papers
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Magnetic Tunnel Junctions for Timekeeping in Intermittent Computing Systems
FLINT estimates power-off duration from the stochastic decay of MTJ arrays, reaching 15-minute range at ≤10% error with ~1 µJ per readout, constant across ranges.
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From sLLG to Fokker-Planck: Accurate WER Modeling for Non-Axisymmetric MRAM Devices
For non-axisymmetric STT/SOT MRAM devices, a 2D Fokker-Planck solver using central differencing matches 10^6-trajectory stochastic LLG write-error rates, while monotone schemes bias switching early.
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