Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference
As of 19 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2403.05465.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-19T06:32:44.657259+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-16T11:55:39.859331Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-10T19:33:38.352009Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 72e49753-fad8-4881-9ba9-aa2b594d0cc4 · inbound
AIRCHITECT v2: Learning the Hardware Accelerator Design Space through Unified Representations cites this paper.
AIRCHITECT v2: Learning the Hardware Accelerator Design Space through Unified Representations Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference
Reference 1
- Resolution
- verified exact
- local_arxiv, observed 2026-08-10T19:33:38.382001Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.
Observation 19b1bd7b-ebd7-4b34-b300-c6fb91a465ae · inbound
Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator cites this paper.
Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator Algorithm-Hardware Co-Design of Distribution-Aware Logarithmic-Posit Encodings for Efficient DNN Inference
Reference 27
- Resolution
- unresolved
- no resolver link, observed 2026-08-16T11:55:39.859331Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.