Pith. sign in

REVIEW 3 major objections 7 minor 69 references

TurboFFT: Co-Designed High-Performance and Fault-Tolerant Fast Fourier Transform on GPUs

T0 review · 3 major / 7 minor · reviewed 2026-08-11 · deepseek-v4-flash

Pith's one-line read TurboFFT claims GPU FFT performance on par with cuFFT while correcting soft errors online.

desk verdict A well-evidenced, reproducible GPU FFT with fused online ABFT; the fault-injection evaluation needs to enforce and report the single-error-per-period assumption. read the letter →

arxiv 2412.05824 v1 pith:CRZ4LHC4 submitted 2024-12-08 cs.DC

classification cs.DC
keywords fastFouriertransformGPUfaulttolerancealgorithm-based(ABFT)softerrorsonlineerrorcorrectioncuFFTCUDA
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

TurboFFT is a from-scratch GPU fast Fourier transform implementation that aims to show that high performance and online fault tolerance can be achieved together rather than traded off. On the performance side, the paper claims that its architecture-aware, padding-free, template-generated kernels are comparable to the leading closed-source GPU FFT library and up to 300% faster for some sizes, while beating a popular open-source implementation. On the reliability side, it introduces a fused two-side algorithm-based fault tolerance (ABFT) scheme with location encoding that detects, locates, and corrects a single soft compute error without extra global memory traffic or immediate recomputation. The experimental claim is that on A100 and T4 GPUs the fault-tolerant version stays within 7–15% overhead even under tens of injected errors per minute, for both single and double precision. A sympathetic reader would care because FFT is a dominant cost in many scientific codes and soft errors are now a practical concern on large GPU systems.

What carries the argument

The load-bearing object is a fused two-side ABFT scheme: algorithm-based fault tolerance uses checksums of a linear transform, and the linearity of the DFT matrix $W$ is what lets a checksum discrepancy equal the error's contribution. The left-side checksum $e^T W X$ detects that an error occurred, while the right-side checksum $W X e$ with location encoding $e_3=(1,2,\dots,N)$ locates which signal in a batch is corrupted, allowing delayed batched correction without recomputation. On the performance side, the key mechanisms are a padding-free register-to-shared-memory swizzling scheme that avoids bank conflicts without wasting shared memory, and a template-based code generator that selects kernel parameters for each input size and datatype. The multi-transaction threadblock design changes the FFT from one global-memory read–compute–write round trip per threadblock to several, so the threadblock-level checksum reduction is shared across more work with no inter-transaction communication.

What would settle it

Inject two bit flips into two different signals covered by the same checksum within one detection–correction period on an A100, then compare the post-correction output to a golden FFT; any remaining difference shows the single-error assumption is load-bearing. A second test is to rerun the error-injection benchmark without hand-picking $\delta$, selecting the threshold automatically from the ROC curve and reporting the resulting false-alarm rate.

Watch

Extended reading notes

Core claim

The paper's central discovery is that the exponential error propagation inside an FFT butterfly network does not force a time-redundant recompute: because the corrupted output values remain proportional to the initial error, one can record the error's location with a column encoding vector and later add back the correction value. Concretely, TurboFFT computes a left-side checksum $e^T W X$ to detect that an error occurred and a right-side checksum $W X e$ with location encoding $e_3=(1,2,\dots,N)$ to identify which signal in a batch was corrupted. Correction is then $ΔX = W X e_2 - (W X) e_2$, added back to the flagged signal. The scheme is fused into the thread-level and threadblock-level FFT kernels so no extra global-memory transaction is needed, and by giving each threadblock several global-memory transactions the threadblock-level reduction cost is amortized. The paper's own summary of the result is that TurboFFT without fault tolerance is comparable to or up to 300% faster than cuFFT, and with fault tolerance maintains 7–15% overhead under tens of error injections per minute.

Load-bearing premise

The scheme corrects only the first soft compute error in each detection–correction window; two errors in one window, or a mis-set detection threshold, breaks the guarantee and inflates overhead.

Editorial extensions

If this is right

  • If the performance claim holds, applications that spend large fractions of runtime in FFT can get soft-error protection without paying a kernel-launch or memory-footprint penalty.
  • The two-side ABFT removes the need to recompute on error: a corrupted output can be fixed by adding back the divergence, so fail-continue errors become correctable online.
  • Multi-transaction threadblocks amortize the threadblock-level reduction, keeping fault tolerance overhead low for FP64 and for problem sizes where cuFFT underutilizes the GPU.
  • The same prototype beats a popular open-source FFT library across many sizes, suggesting the closed-source library's performance is not an intrinsic ceiling.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The two-side checksum idea should transfer to other linear transforms with butterfly-like data flow, where a single input error fans out to many outputs; the same detect-locate-add-back pattern would apply without recomputation.
  • Because the reported overhead is measured under tens of injected errors per minute, the relevant stress test is two errors inside one detection–correction window; a fault-injection study with correlated bursts would reveal the actual protection envelope.
  • Publishing the ROC-selected threshold $\delta$ and the false-alarm rate as a table would make the 7–15% overhead reproducible across GPUs and problem sizes.
Share X Bluesky LinkedIn Reddit HN

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 7 minor

Summary. This paper presents TurboFFT, a GPU FFT implementation co-designed for high performance and online fault tolerance. The authors first build a high-performance FFT kernel using architecture-aware, padding-free, and template-based optimizations, then add a two-side ABFT scheme with location encoding at thread and threadblock levels, plus a multi-transaction design that amortizes the threadblock-level reduction. Experiments on an NVIDIA A100 and a T4 GPU claim performance comparable to or faster than cuFFT (up to 300% faster for some sizes) and a 7% to 15% overhead under error injection for both FP32 and FP64.

Significance. If the claims are substantiated, this is a valuable contribution: an open, competitive GPU FFT baseline together with online soft-error correction at low overhead is practically useful for scientific computing. The paper provides a reproducible artifact with one-command scripts for all main figures, which is a notable strength. However, the fault-tolerance guarantee is explicitly limited by the single-event upset (SEU) assumption, and the evaluation leaves the detection threshold and injection protocol unspecified; the online-correction claim is therefore narrower than the abstract implies.

major comments (3)
  1. [§2.2.4, §4.1.2] The SEU fault model limits the number of errors per detection-correction period but does not restrict where the error occurs, while the two-side ABFT decoding (using location vector e3 = (1,2,...,N) and the correction value ΔX = WXe2 - (WX)e2) assumes the error corrupts the main data path. If a single soft error strikes the computation of the checksum vectors (e.g., Xe2 or the left-side checksum), the scheme will produce a nonzero ΔX for correct data, and the subsequent 'correction' will actively corrupt otherwise valid output. The paper must either state and justify the additional assumption that the checksum computations are error-free, or extend the scheme to cover checksum-path errors; as written, the online-correction guarantee in the abstract is not established for the stated fault model.
  2. [§5.3.1, §5.3.2] The detection threshold δ is chosen via ROC analysis but its numerical value is never reported in the overhead experiments, and the ROC test injects exactly one bit flip per test signal rather than a time-ordered injection stream. The 7% to 15% overhead figures are therefore tied to an unspecified δ, and the experiments do not demonstrate that the injection schedule enforces at most one error per detection-correction period. The period length is not given, and the abstract's 'tens' versus the conclusion's 'hundreds' of injections per minute are unreconciled; please report δ, the period definition, and the injection protocol, or the overhead-versus-correctness trade-off cannot be assessed.
  3. [§5.2, §5.3.2] Overhead and speedup numbers are reported as single-point values (e.g., 3%, 2%, 13%, and the 7% to 15% range) without repetition counts, standard deviations, or confidence intervals. Given the central claim is low overhead, the authors should report the number of runs and the variance; otherwise it is unclear whether the differences between configurations (e.g., 1-transaction versus 4-transaction ABFT) are statistically meaningful.
minor comments (7)
  1. [Abstract vs. Conclusion] The abstract states 'tens of error injections per minute' while the conclusion states 'hundreds of error injections per minute'; please reconcile these numbers.
  2. [Abstract, §5.1.1] The abstract and introduction claim 'up to 300% faster' than cuFFT, but Section 5.1.1 reports a 40% to 200% improvement at N=214; please align the claim with the data.
  3. [Abstract, §4.3] The abstract says the multi-transaction design has 'zero additional operations', but Section 4.3 states 'A minimal thread-level accumulation is introduced'; please correct the wording.
  4. [Figures 16-22] The figure captions and axis labels in the provided text contain garbled Unicode sequences (e.g., '/uni0000004f/uni00000052/...'); please ensure the final PDF renders all figure text correctly.
  5. [§5.1.5] The heading 'Optimiations Impact Overview' contains a typo; it should be 'Optimizations Impact Overview'.
  6. [References] References [1] (TensorFlow) and [37] (PyTorch) do not appear to be cited anywhere in the text; please either cite them appropriately or remove them.
  7. [Table 1] Table 1 lists kernel parameters for the T4 only, yet most experiments are run on the A100; the A100 parameter settings should be reported as well.

Circularity Check

1 steps flagged · score 1.0 of 10

No significant circularity; the performance and overhead figures are direct measurements against external baselines, and the ABFT math is self-contained, with only one minor in-sample threshold calibration in the ROC analysis.

  1. fitted input called prediction [Section 5.3.1 (Error Injection Analysis) and Section 5.3.2 (Error Injection Evaluation).]
    "by selecting an appropriate fault detection threshold δ, the proposed detection scheme is capable of identifying injected faults with a high degree of reliability and a negligible false alarm rate. Faults are injected in half of these runs (1000 of 2000) by first choosing a signal to affect, and then flipping exactly one bit of its 32-bit representation for float-precision and 64-bit representation for double-precision. A checksum test with threshold δ is used to attempt to identify the affected computations."

    The detection threshold δ is selected via ROC analysis on exactly the fault-injection protocol (one random bit flip per test signal) that is then reused in the error-injection overhead evaluation, so the claimed 'high degree of reliability' is an in-sample characterization of a detector fitted to its own test distribution rather than a parameter-free prediction, and the fitted value of δ is never reported, which also impedes reproducibility. The step is non-load-bearing for the paper's headline numbers: the 7-15% fault-tolerance overhead and the 13% vs. cuFFT injection overhead are direct wall-clock measurements under the chosen configuration, not outputs of the ROC fit, so the central quantitative claims are not forced by the calibration.

full rationale

The paper's two central claims are empirically grounded rather than derived from fitted inputs. The performance claims (comparable to or up to 300% faster than cuFFT, faster than VkFFT) are benchmark measurements on A100 and T4 against closed-source and open-source external baselines, so they are self-contained and externally falsifiable. The fault-tolerance claims likewise rest on measurements: the overhead figures are timings, and the two-side ABFT mathematics (Eqns. 3-5; location encoding e3 = (1,2,...,N)) is self-contained linear algebra whose correction property holds by construction under the explicitly adopted single-event upset assumption stated in Section 2.2.4; choosing an encoding so that decoding works is legitimate design, not circularity. The SEU assumption is justified in part by the authors' own prior ABFT works [9, 48, 53], but the assumption is presented as an adopted modeling choice and the correction scheme's derivation does not reduce to those citations, so this self-citation is not load-bearing. Two non-circular concerns are flagged: the ROC-calibrated threshold δ described above is an in-sample fit whose value is omitted, and the abstract says 'tens of error injections per minute' while the conclusion says 'hundreds,' with the detection-correction period length never reported, so the SEU regime's applicability to the injection experiments cannot be verified from the text. These are scope and reproducibility limitations, not reductions of any prediction to its own inputs.

Assumptions & free parameters 2 free parameters · 3 assumptions · 0 invented entities

The central claims depend on DFT linearity, the SEU fault model, and the scoping of memory/communication faults to ECC and FT-MPI. The detection threshold delta and kernel tile parameters are tuned empirically; the encoding vectors are explicit design choices.

free parameters (2)
  • detection threshold delta = not reported
    Chosen from ROC curve in Section 5.3.1 (Figure 19); directly controls false alarm rate and thus the measured 7-15% fault tolerance overhead in Section 5.3.2.
  • kernel tile parameters (N1,N2,N3,n1,n2,n3,bs) = e.g., Table 1 (2^10: N1=2^10; 2^23: N1=2^8,N2=2^7,N3=2^8,n1=16,n2=16,n3=16,bs=16)
    Manually searched using template-based code generation (Section 3.3.2); maximize FFT performance for each input shape and hardware.
assumptions (3)
  • standard math FFT computes the DFT exactly up to floating-point round-off, and its factors share the linearity of the DFT.
    Used throughout Sections 3 and 4; the checksum formulas (1)-(3) assume exact linearity W(x+e)=Wx+We and e^T W x = (e^T W)x.
  • domain assumption At most one soft error occurs in each detection and correction period (SEU).
    Stated in Section 2.2.4; the two-side ABFT detects and localizes a single error; a second error within the period would violate the location decoding.
  • domain assumption Memory errors are handled by ECC and communication errors by FT-MPI, so only compute-unit errors need protection.
    Stated in Section 2.2.4; defines the fault model and justifies why the checksum only targets arithmetic unit bit flips.

how reviews work

0 comments
Cite this review

Pith. "Pith review of TurboFFT: Co-Designed High-Performance and Fault-Tolerant Fast Fourier Transform on GPUs." pith.science (2026). https://pith.science/paper/CRZ4LHC4

@misc{pith2026241205824,
  author       = {Pith},
  title        = {Pith review of: TurboFFT: Co-Designed High-Performance and Fault-Tolerant Fast Fourier Transform on GPUs},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/CRZ4LHC4}},
  note         = {Machine review of arXiv:2412.05824}
}
read the original abstract

GPU-based fast Fourier transform (FFT) is extremely important for scientific computing and signal processing. However, we find the inefficiency of existing FFT libraries and the absence of fault tolerance against soft error. To address these issues, we introduce TurboFFT, a new FFT prototype co-designed for high performance and online fault tolerance. For FFT, we propose an architecture-aware, padding-free, and template-based prototype to maximize hardware resource utilization, achieving a competitive or superior performance compared to the state-of-the-art closed-source library, cuFFT. For fault tolerance, we 1) explore algorithm-based fault tolerance (ABFT) at the thread and threadblock levels to reduce additional memory footprint, 2) address the error propagation by introducing a two-side ABFT with location encoding, and 3) further modify the threadblock-level FFT from 1-transaction to multi-transaction in order to bring more parallelism for ABFT. Our two-side strategy enables online correction without additional global memory while our multi-transaction design averages the expensive threadblock-level reduction in ABFT with zero additional operations. Experimental results on an NVIDIA A100 server GPU and a Tesla Turing T4 GPU demonstrate that TurboFFT without fault tolerance is comparable to or up to 300\% faster than cuFFT and outperforms VkFFT. TurboFFT with fault tolerance maintains an overhead of 7\% to 15\%, even under tens of error injections per minute for both FP32 and FP64.

Figures

Figures reproduced from arXiv: 2412.05824 by the authors.

Figure 1
Figure 1. FFT performance comparison with cuFFT on an NVIDIA [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. , one corrupted data in a 64-point FFT will spread to all other data in 6 iterations. Existing ABFT schemes detect errors by utilizing a perspective of GEMV in DFT, namely (e 𝑇𝑊 )x = e 𝑇 (𝑊 x), as shown in Eqn. (1) and (2). … … … …… … Iteration 1 Iteration 6 Input X All data are corrupted Error Propagation Normal Corrupted 𝒚 = 𝜔𝑁 0 𝜔𝑁 0 𝜔𝑁 0 𝜔𝑁 0 𝜔𝑁 1 𝜔𝑁 2 ⋯ 𝜔𝑁 0 𝜔𝑁 𝑛−1 𝜔𝑁 2(𝑛−1) ⋮ ⋮ ⋱ ⋮ 𝜔𝑁 0 , 𝜔𝑁 𝑛−1 ⋯ 𝜔𝑁 𝑛−1 2 𝒙 … view at source ↗
Figure 4
Figure 4. Our padding-free design achieves 100% shared memory [PITH_FULL_IMAGE:figures/full_fig_p004_4.png] view at source ↗
Figures from the paper (14 more)
Figure 5
Figure 5. Figure 5: Benefit of two-sided ABFT: Delayed Batched Correction [PITH_FULL_IMAGE:figures/full_fig_p005_5.png]
Figure 7
Figure 7. Figure 7: Thread-level Two-sided ABFT. 4.2.1 Thread-level Two-sided ABFT. In [PITH_FULL_IMAGE:figures/full_fig_p006_7.png]
Figure 6
Figure 6. Figure 6: Motivation: Red area incurs high overhead. Blue region [PITH_FULL_IMAGE:figures/full_fig_p006_6.png]
Figure 8
Figure 8. Figure 8: Checksum encoding at Threadblock Level. and loaded into the threadblock from global memory into the shared memory, as shown in 8 (a). The input signal encoding is performed through register reuse, which is in conjunction with loading input signals from global memory. A…
Figure 10
Figure 10. Figure 10: Performance of generated FP32 FFT kernels on A100 blidiidd biiThbdidh [PITH_FULL_IMAGE:figures/full_fig_p008_10.png]
Figure 11
Figure 11. Figure 11: Performance of generated FP64 FFT kernels on A100 [PITH_FULL_IMAGE:figures/full_fig_p008_11.png]
Figure 12
Figure 12. Figure 12: A100 FP32. smaller FFT sizes, each thread block only needs to launch a small number of threads, when the batch size increases, each thread block should also increase the number of threads launched correspondingly to enhance throughput. For in￾stance, as shown in the d…
Figure 14
Figure 14. Figure 14: Comparison of batched FFT performance without fault [PITH_FULL_IMAGE:figures/full_fig_p009_14.png]
Figure 15
Figure 15. Figure 15: TurboFFT w/o FT stepwise optimizations on T4, FP32 [PITH_FULL_IMAGE:figures/full_fig_p009_15.png]
Figure 17
Figure 17. Figure 17: ABFT stepwise optimization for FP64 FFT on A100. [PITH_FULL_IMAGE:figures/full_fig_p010_17.png]
Figure 19
Figure 19. Figure 19: Error Analysis 5.3.2 Error Injection Evaluation. Figures 20 extends the analysis to include the performance of TurboFFT under error [PITH_FULL_IMAGE:figures/full_fig_p010_19.png]
Figure 20
Figure 20. Figure 20: Error injection experiments on A100 GPU 5.4 Performance Evaluation on T4 TurboFFT shows competitive performance for both with or without fault tolerance, as shown in [PITH_FULL_IMAGE:figures/full_fig_p011_20.png]
Figure 21
Figure 21. Figure 21: TurboFFT w/o FT for FP32 on T4. 0 5 10 15 20 (a) Compute Performance 0.0 0.2 0.4 0.6 0.8 TFLOPS logN cuFFT VkFFT TurboFFT w/o FT TurboFFT w/ FT TurboFFT: err. inj. Offline FT-FFT: err. inj. 0 5 10 15 20 (b) Memory Throughput 100 200 GB/s logN [PITH_FULL_IMAGE:figures…
Figure 22
Figure 22. Figure 22: details the comparison of TurboFFT under error injection on T4, and Offline FT-FFT is included. TurboFFT under error injection incurs a negligible overhead of 3% for FP32 compared to TurboFFT without error injection. 0 logN 10 20 logBS 0 10 20 TFLOPS 0 0.5 8.1 Rooflin…

Discussion (0). Continue with ORCID to comment.

Reference graph

Works this paper leans on

69 extracted references · 66 canonical work pages

  1. [1]

    Martín Abadi, Ashish Agarwal, Paul Barham, Eugene Brevdo, Zhifeng Chen, Craig Citro, Greg S. Corrado, Andy Davis, Jeffrey Dean, Matthieu Devin, Sanjay Ghemawat, Ian Goodfellow, Andrew Harp, Geoffrey Irving, Michael Isard, Yangqing Jia, Rafal Jozefowicz, Lukasz Kaiser, Manjunath Kudlur, Josh Levenberg, Dandelion Mané, Rajat Monga, Sherry Moore, Derek Murra...

  2. [2]

    Robert Baumann. 2002. Soft errors in commercial semiconductor technology: Overview and scaling trends. IEEE 2002 Reliability Physics Tutorial Notes, Reliability Fundamentals 7 (2002)

  3. [3]

    Daniel Binder, Edward C Smith, and AB Holman. 1975. Satellite anom- alies from galactic cosmic rays. IEEE Transactions on Nuclear Science 22, 6 (1975), 2675–2680

  4. [4]

    John M Bird, Michael K Peters, Travis Z Fullem, Michael J Tostanoski, Terrence F Deaton, Kristianto Hartojo, and Roy E Strayer. 2017. Neu- tron induced single event upset (seu) testing of commercial memory devices with embedded error correction codes (ecc). In 2017 IEEE Ra- diation Effects Data Workshop (REDW) . IEEE, 1–8

  5. [5]

    Jon Calhoun, Marc Snir, Luke N Olson, and William D Gropp. 2017. Towards a more complete understanding of SDC propagation. In Pro- ceedings of the 26th International Symposium on High-Performance Parallel and Distributed Computing . ACM, 131–142

  6. [6]

    Zizhong Chen. 2008. Extending algorithm-based fault tolerance to tol- erate fail-stop failures in high performance distributed environments. In 2008 IEEE International Symposium on Parallel and Distributed Pro- cessing. IEEE, 1–8

  7. [7]

    Zizhong Chen and Jack Dongarra. 2008. A scalable checkpoint en- coding algorithm for diskless checkpointing. In 2008 11th IEEE High Assurance Systems Engineering Symposium . IEEE, 71–79

  8. [8]

    Chen-Yong Cher, Meeta S Gupta, Pradip Bose, and K Paul Muller

Show all 69 references
  1. [9]

    Chong Ding, Christer Karlsson, Hui Liu, Teresa Davies, and Zizhong Chen. 2011. Matrix multiplication on gpus with on-line fault tolerance. In 2011 IEEE Ninth International Symposium on Parallel and Distributed Processing with Applications. IEEE, 311–317

  2. [10]

    Harish Dattatraya Dixit, Sneha Pendharkar, Matt Beadon, Chris Ma- son, Tejasvi Chakravarthy, Bharath Muthiah, and Sriram Sankar. 2021. Silent data corruptions at scale. arXiv preprint arXiv:2102.11245 (2021)

  3. [11]

    Jack Dongarra, Pete Beckman, Terry Moore, Patrick Aerts, Giovanni Aloisio, Jean-Claude Andre, David Barkai, Jean-Yves Berthou, Taisuke Boku, Bertrand Braunschweig, et al. 2011. The international exascale software project roadmap. International Journal of High Performance PPoPP...

  4. [12]

    Graham E Fagg and Jack J Dongarra. 2000. FT-MPI: Fault tolerant MPI, supporting dynamic applications in a dynamic world. In European parallel virtual machine/message passing interface users’ group meeting . Springer, 346–353

  5. [13]

    Hongyi Fu and Xuejun Yang. 2009. Fault tolerant parallel FFT using parallel failure recovery. In 2009 International Conference on Computa- tional Science and Its Applications . IEEE, 257–261

  6. [14]

    Al Geist. 2016. Supercomputing’s monster in the closet. IEEE Spectrum 53, 3 (2016), 30–35

  7. [15]

    Salman Habib, Adrian Pope, Hal Finkel, Nicholas Frontiere, Katrin Heitmann, David Daniel, Patricia Fasel, Vitali Morozov, George Zagaris, Tom Peterka, et al . 2016. HACC: Simulating sky surveys on state- of-the-art supercomputing architectures. New Astronomy 42 (2016), 49–65

  8. [16]

    Doug Hakkarinen, Panruo Wu, and Zizhong Chen. 2014. Fail-stop failure algorithm-based fault tolerance for cholesky decomposition. IEEE Transactions on Parallel and Distributed Systems 26, 5 (2014), 1323– 1335

  9. [17]

    Peter H Hochschild, Paul Turner, Jeffrey C Mogul, Rama Govindaraju, Parthasarathy Ranganathan, David E Culler, and Amin Vahdat. 2021. Cores that don’t count. In Proceedings of the Workshop on Hot Topics in Operating Systems. 9–16

  10. [18]

    Jiajun Huang, Jinyang Liu, Sheng Di, Yujia Zhai, Zizhe Jian, Shixun Wu, Kai Zhao, Zizhong Chen, Yanfei Guo, and Franck Cappello. 2023. Exploring Wavelet Transform Usages for Error-bounded Scientific Data Compression. In 2023 IEEE International Conference on Big Data (BigData)....

  11. [19]

    Zizhe Jian, Sheng Di, Jinyang Liu, Kai Zhao, Xin Liang, Haiying Xu, Robert Underwood, Shixun Wu, Jiajun Huang, Zizhong Chen, et al

  12. [21]

    Jeremy Johnston, Xiao-Yang Liu, Shixun Wu, and Xiaodong Wang

  13. [22]

    J-Y Jou and Jacob A. Abraham. 1988. Fault-tolerant FFT networks. IEEE Trans. Comput. 37, 5 (1988), 548–561

  14. [23]

    Jeongnim Kim, Andrew D Baczewski, Todd D Beaudet, Anouar Be- nali, M Chandler Bennett, Mark A Berrill, Nick S Blunt, Edgar Jo- sué Landinez Borda, Michele Casula, David M Ceperley, et al . 2018. QMCPACK: an open source ab initio quantum Monte Carlo package for the electronic s...

  15. [24]

    Jean-Claude Laprie. 1985. Dependable computing and fault-tolerance. Digest of Papers FTCS-15 (1985), 2–11

  16. [25]

    In 2023 59th Annual Allerton Conference on Communication, Control, and Computing (Allerton)

    Downlink Beamforming Optimization via Deep Learning. In 2023 59th Annual Allerton Conference on Communication, Control, and Computing (Allerton). IEEE, 1–5

  17. [26]

    Xin Liang, Jieyang Chen, Dingwen Tao, Sihuan Li, Panruo Wu, Hongbo Li, Kaiming Ouyang, Yuanlai Liu, Fengguang Song, and Zizhong Chen

  18. [27]

    Jinyang Liu, Sheng Di, Kai Zhao, Xin Liang, Sian Jin, Zizhe Jian, Jiajun Huang, Shixun Wu, Zizhong Chen, and Franck Cappello. 2024. High- performance Effective Scientific Error-bounded Lossy Compression with Auto-tuned Multi-component Interpolation. Proceedings of the ACM on M...

  19. [28]

    Jinyang Liu, Jiannan Tian, Shixun Wu, Sheng Di, Boyuan Zhang, Robert Underwood, Yafan Huang, Jiajun Huang, Kai Zhao, Guanpeng Li, et al. 2024. CUSZ-i: High-Ratio Scientific Lossy Compression on GPUs with Optimized Multi-Level Interpolation. In 2024 SC24: Interna- tional Confer...

  20. [29]

    Guanpeng Li, Siva Kumar Sastry Hari, Michael Sullivan, Timothy Tsai, Karthik Pattabiraman, Joel Emer, and Stephen W Keckler. 2017. Understanding error propagation in deep learning neural network (DNN) accelerators and applications. InProceedings of the International Conference...

  21. [30]

    Robert Lucas, James Ang, Keren Bergman, Shekhar Borkar, William Carlson, Laura Carrington, George Chiu, Robert Colwell, William Dally, Jack Dongarra, et al . 2014. DOE advanced scientific comput- ing advisory subcommittee (ASCAC) report: top ten exascale research challenges. T...

  22. [31]

    Robyn R Lutz. 1993. Analyzing software requirements errors in safety- critical, embedded systems. In [1993] Proceedings of the IEEE Interna- tional Symposium on Requirements Engineering . IEEE, 126–133

  23. [32]

    Timothy C May and Murray H Woods. 1979. Alpha-particle-induced soft errors in dynamic memories. IEEE Transactions on Electron Devices 26, 1 (1979), 2–9

  24. [33]

    Subhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyung- min Cho, Rajiv Joshi, Young Moon Kim, Charles R Lefurgy, Yanjing Li, Kenneth P Rodbell, et al. 2014. The resilience wall: Cross-layer solu- tion strategies. In Proceedings of Technical Program-2014 International ...

  25. [34]

    Xiao-Yang Liu, Zechu Li, Shixun Wu, and Xiaodong Wang. 2023. Sta- tionary deep reinforcement learning with quantum k-spin hamiltonian regularization. In ICLR 2023 Workshop on Physics for Machine Learning

  26. [35]

    Michael Nicolaidis. 1999. Time redundancy based soft-error tolerance to rescue nanometer technologies. In Proceedings 17th IEEE VLSI Test Symposium (Cat. No. PR00146) . IEEE, 86–94

  27. [36]

    Daniel Oliveira, Laércio Pilla, Nathan DeBardeleben, Sean Blanchard, Heather Quinn, Israel Koren, Philippe Navaux, and Paolo Rech. 2017. Experimental and analytical study of Xeon Phi reliability. In Proceed- ings of the International Conference for High Performance Computing, ...

  28. [37]

    Adam Paszke, Sam Gross, Francisco Massa, Adam Lerer, James Brad- bury, Gregory Chanan, Trevor Killeen, Zeming Lin, Natalia Gimelshein, Luca Antiga, Alban Desmaison, Andreas Kopf, Edward Yang, Zachary DeVito, Martin Raison, Alykhan Tejani, Sasank Chilamkurthy, Benoit Steiner, L...

  29. [38]

    EL Petersen, R Koga, MA Shoga, JC Pickel, and WE Price. 2013. The single event revolution. IEEE Transactions on Nuclear Science 60, 3 (2013), 1824–1835

  30. [39]

    T Murphy and R Lyon. 1998. NGST autonomous optical control system. Space Telescope Science Inst (1998)

  31. [40]

    Laercio L Pilla, Paolo Rech, Francesco Silvestri, Christopher Frost, Philippe Olivier Alexandre Navaux, M Sonza Reorda, and Luigi Carro

  32. [41]

    George A Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, and David I August. 2005. SWIFT: Software implemented fault tolerance. In Proceedings of the international symposium on Code generation and optimization. IEEE Computer Society, 243–254

  33. [42]

    Marc Snir, Robert W Wisniewski, Jacob A Abraham, Sarita V Adve, Saurabh Bagchi, Pavan Balaji, Jim Belak, Pradip Bose, Franck Cappello, Bill Carlson, et al. 2014. Addressing failures in exascale computing. The International Journal of High Performance Computing Applications 28,...

  34. [43]

    HS Stockman and John Mather. 1999. NGST: Seeing the first stars and galaxies form. In Symposium-International Astronomical Union , Vol. 186. Cambridge University Press, 493–499

  35. [44]

    James C Phillips, Rosemary Braun, Wei Wang, James Gumbart, Emad Tajkhorshid, Elizabeth Villa, Christophe Chipot, Robert D Skeel, Laxmikant Kale, and Klaus Schulten. 2005. Scalable molecular dy- namics with NAMD. Journal of computational chemistry 26, 16 (2005), 1781–1802

  36. [45]

    Aidan P Thompson, H Metin Aktulga, Richard Berger, Dan S Bolin- tineanu, W Michael Brown, Paul S Crozier, Pieter J In’t Veld, Axel Kohlmeyer, Stan G Moore, Trung Dac Nguyen, et al. 2022. LAMMPS-a flexible simulation tool for particle-based materials modeling at the atomic, mes...

  37. [46]

    IEEE Transactions on Nuclear Science 61, 4 (2014), 1874–1880

    Software-based hardening strategies for neutron sensitive FFT algorithms on GPUs. IEEE Transactions on Nuclear Science 61, 4 (2014), 1874–1880. TurboFFT: Co-Designed High-Performance and Fault-Tolerant Fast Fourier Transform on GPUs PPoPP’25, March 01–05, 2025, Las Vegas, NV, USA

  38. [47]

    Sying-Jyan Wang and Niraj K. Jha. 1994. Algorithm-based fault toler- ance for FFT networks. IEEE Trans. Comput. 43, 7 (1994), 849–854

  39. [48]

    Panruo Wu and Zizhong Chen. 2014. FT-ScaLAPACK: Correcting soft errors on-line for ScaLAPACK Cholesky, QR, and LU factorization routines. In Proceedings of the 23rd international symposium on High- performance parallel and distributed computing . ACM, 49–60

  40. [49]

    Shixun Wu, Yitong Ding, Yujia Zhai, Jinyang Liu, Jiajun Huang, Zizhe Jian, Huangliang Dai, Sheng Di, Bryan M Wong, Zizhong Chen, et al

  41. [50]

    Dingwen Tao, Sheng Di, Xin Liang, Zizhong Chen, and Franck Cap- pello. 2018. Improving performance of iterative methods by lossy checkponting. In Proceedings of the 27th international symposium on high-performance parallel and distributed computing . 52–65

  42. [51]

    Shixun Wu, Yujia Zhai, Jiajun Huang, Zizhe Jian, and Zizhong Chen

  43. [52]

    Charles Van Loan. 1992. Computational frameworks for the fast Fourier transform. SIAM

  44. [53]

    Yujia Zhai, Elisabeth Giem, Quan Fan, Kai Zhao, Jinyang Liu, and Zizhong Chen. 2021. FT-BLAS: a high performance BLAS implementa- tion with online fault tolerance. InProceedings of the ACM International Conference on Supercomputing. 127–138

  45. [54]

    Pawel Zuk, Hongwei Jin, Imtiaz Mahmud, Krishnan Raghavan, Komal Thareja, Shixun Wu, Prasanna Balaprakash, Franck Cappello, Zizhong Chen, Ewa Deelman, et al. [n. d.]. SWARM: Scientific Workflow Appli- cations on Resilient Metasystem. ([n. d.]). A Artifact Description A.1 Paper’...

  46. [56]

    arXiv preprint arXiv:2408.01391 (2024)

    FT K-Means: A High-Performance K-Means on GPU with Fault Tolerance. arXiv preprint arXiv:2408.01391 (2024)

  47. [57]

    Shixun Wu, Krishnan Raghavan, Sheng Di, Zizhong Chen, and Franck Cappello. 2024. DGRO: Diameter-Guided Ring Optimization for Integrated Research Infrastructure Membership. arXiv preprint arXiv:2410.11142 (2024)

  48. [59]

    In Proceedings of the 32nd International Symposium on High-Performance Parallel and Distributed Computing

    Ft-gemm: A fault tolerant high performance gemm implementa- tion on x86 cpus. In Proceedings of the 32nd International Symposium on High-Performance Parallel and Distributed Computing . 323–324

  49. [60]

    Shixun Wu, Yujia Zhai, Jinyang Liu, Jiajun Huang, Zizhe Jian, Bryan Wong, and Zizhong Chen. 2023. Anatomy of High-Performance GEMM with Online Fault Tolerance on GPUs. In Proceedings of the 37th Inter- national Conference on Supercomputing . 360–372

  50. [63]

    Ensure all dependencies are installed (see Section C)

  51. [64]

    Run the script: • On NVIDIA A100 Machine: ./run_A100.sh • On NVIDIA T4 Machine: ./run_T4.sh

  52. [65]

    • Figures will be saved in the TurboFFT/artifact_ figures directory

    View results: • Experimental data will be available in theTurboFFT/ artifact_data directory. • Figures will be saved in the TurboFFT/artifact_ figures directory. D.2 Workflow Overview The scripts run_A100.sh and run_T4.sh execute the follow- ing steps:

  53. [66]

    Environment Setup: Configures environment vari- ables

  54. [67]

    Code Generation: Generates required CUDA kernels

  55. [68]

    Compilation: Builds TurboFFT and related binaries

  56. [69]

    Benchmarking: Runs benchmarks for TurboFFT

  57. [70]

    Plotting: Produces figures matching the paper’s re- sults. TurboFFT: Co-Designed High-Performance and Fault-Tolerant Fast Fourier Transform on GPUs PPoPP’25, March 01–05, 2025, Las Vegas, NV, USA D.3 Runtime Details Table 6 shows the estimated execution time of run_A100.sh and...

  58. [2014]

    In SC’14: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

    Understanding soft error resiliency of blue gene/q compute chip through hardware proton irradiation and software fault injection. In SC’14: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis . IEEE, 587–596

  59. [2017]

    InProceed- ings of the International Conference for High Performance Computing, Networking, Storage and Analysis

    Correcting soft errors online in fast Fourier transform. InProceed- ings of the International Conference for High Performance Computing, Networking, Storage and Analysis. ACM, 30

  60. [2023]

    IEEE Transactions on Signal Processing (2023)

    A Curriculum Learning Approach to Optimization with Applica- tion to Downlink Beamforming. IEEE Transactions on Signal Processing (2023)

  61. [2024]

    In 2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS)

    CliZ: Optimizing lossy compression for climate datasets with adaptive fine-tuned data prediction. In 2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS) . IEEE, 417–429

Pith tools

Reviewed August 11, 2026 · model on record in the stance chip above.