A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures

Dirk Van Essendelft; Patrick Wingo; Ryan Smith; Terry Jordan; Wissam Saidi

A System Level Compiler for Massively-Parallel, Spatial, Dataflow Architectures

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arxiv 2506.15875 v1 pith:CTPLLB4X submitted 2025-06-18 cs.PL cs.ARcs.DCcs.ET

Dirk Van Essendelft , Patrick Wingo , Terry Jordan , Ryan Smith , Wissam Saidi This is my paper

classification cs.PLcs.ARcs.DCcs.ET

keywords architecturescompilermachspatialcodeconceptdataflowdesigned

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We have developed a novel compiler called the Multiple-Architecture Compiler for Advanced Computing Hardware (MACH) designed specifically for massively-parallel, spatial, dataflow architectures like the Wafer Scale Engine. Additionally, MACH can execute code on traditional unified-memory devices. MACH addresses the complexities in compiling for spatial architectures through a conceptual Virtual Machine, a flexible domain-specific language, and a compiler that can lower high-level languages to machine-specific code in compliance with the Virtual Machine concept. While MACH is designed to be operable on several architectures and provide the flexibility for several standard and user-defined data mappings, we introduce the concept with dense tensor examples from NumPy and show lowering to the Wafer Scale Engine by targeting Cerebras' hardware specific languages.

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Unstructured Hydrodynamics on Spatial Dataflow Architectures: A Joint Code and Data Decomposition Approach
cs.DC 2026-07 conditional novelty 6.0 of 10

A joint code-and-data decomposition pipeline maps the LULESH proxy application onto the Cerebras WSE, measured up to 4.8x faster than an NVIDIA A100, with analytical models predicting runtime within ~50%.

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