Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-12T21:35:10.174955Z
Paper Citation Record · LEDGER
Effect of Top Al$_2$O$_3$ Interlayer Thickness on Memory Window and Reliability of FeFETs With TiN/Al$_2$O$_3$/Hf$_{0.5}$Zr$_{0.5}$O$_2$/SiO$_x$/Si (MIFIS) Gate Structure
As of 20 August 2026, this Paper Citation Record lists 2 of 2 outbound references and 0 inbound Pith citation observations for arXiv:2411.08558.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-20T06:33:59.587034+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links
A source-named dated measurement, never combined with another source.
Source: cited_works
Reference resolution
2 of 2 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved2
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
Observation 12b6a9ee-04e2-4869-973c-f8619e927493 · outbound
This paper cites Comprehensive Design Guidelines of Gate Stack for QLC and Highly Reliable Ferroelectric VNAND,.
Effect of Top Al$_2$O$_3$ Interlayer Thickness on Memory Window and Reliability of FeFETs With TiN/Al$_2$O$_3$/Hf$_{0.5}$Zr$_{0.5}$O$_2$/SiO$_x$/Si (MIFIS) Gate Structure Comprehensive Design Guidelines of Gate Stack for QLC and Highly Reliable Ferroelectric VNAND,
Reference 1
- Resolution
- unresolved
- no resolver link, observed 2026-08-12T21:35:10.169714Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 42409fa3-0694-46a1-b917-ecb88d6ce8d0 · outbound
This paper cites First demonstration of vertically stacked ferroelectric Al doped HfO 2 devices for NAND applications,.
Effect of Top Al$_2$O$_3$ Interlayer Thickness on Memory Window and Reliability of FeFETs With TiN/Al$_2$O$_3$/Hf$_{0.5}$Zr$_{0.5}$O$_2$/SiO$_x$/Si (MIFIS) Gate Structure First demonstration of vertically stacked ferroelectric Al doped HfO 2 devices for NAND applications,
Reference 12
- Resolution
- unresolved
- no resolver link, observed 2026-08-12T21:35:10.174955Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Pith citing papers
No inbound Pith citation observations are available.