Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Enhancing Large Language Models for Hardware Verification: A Novel SystemVerilog Assertion Dataset
As of 8 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2503.08923.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-01T09:49:36.513836Z
A source-named dated measurement, never combined with another source.
Source: cited_works
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 2cbeba81-2246-4b93-9d3b-ff6166a9a558 · inbound
WaveformQA: Benchmarking LLM Temporal Reasoning on Digital Waveforms cites this paper.
WaveformQA: Benchmarking LLM Temporal Reasoning on Digital Waveforms Enhancing Large Language Models for Hardware Verification: A Novel SystemVerilog Assertion Dataset
Reference 27
- Resolution
- unresolved
- no resolver link, observed 2026-08-01T09:49:36.513836Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.