A Tailed Tent Map Chaotic Circuit Exploiting S²I Memory Elements

In the implementation of discrete time chaotic systems, designers have mostly focused on the choice and synthesis of suitable nonlinear blocks, while correct and fast operation cannot neglect analog memory elements. Herein, a realization exploiting the Tailed Tent Map coupled with S$^2$I sample and hold stages is proposed. Interfacing problems between the memory and the processing sub-circuits are tackled and the possibility to obtain a fivefold speed improvement with respect to previously reported results is demonstrated by means of SPICE and other computer aided simulations.