Paper Citation Record · LEDGER

Ternary circuits: why R=3 is not the Optimal Radix for Computation

As of 16 August 2026, this Paper Citation Record lists 17 of 17 outbound references and 0 inbound Pith citation observations for arXiv:1908.06841.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
1908.06841 v1

Coverage vector

measured 17 of 17 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-14T12:36:49.883714Z

measured 17 of 17 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-16T06:30:59.297886+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

17 of 17 outbound references displayed

verified exact0
verified fuzzy10
unresolved6
parse uncertain0
malformed identifier1
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 806d6a49-e3ef-407f-9c24-cba38757f573 · outbound

This paper cites Hurst, “Multiple-Valued Logic - Its Status and Its Future“, IEEE Trans.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Hurst, “Multiple-Valued Logic - Its Status and Its Future“, IEEE Trans

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.809018Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 5009b0ef-fb0e-42bf-9339-3af9811c4453 · outbound

This paper cites Development of ternary computers at Moscow State Uni- versity.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Development of ternary computers at Moscow State Uni- versity

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.107331Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 0b49a97c-40f9-4a64-a8c0-cefc5b66291d · outbound

This paper cites New dynamic ternary minimum and maximum circuits with reduced switching activity and without any additional voltage sources.

Ternary circuits: why R=3 is not the Optimal Radix for Computation New dynamic ternary minimum and maximum circuits with reduced switching activity and without any additional voltage sources

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.093231Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 908049c8-a5fb-4707-bf49-c6217b94b977 · outbound

This paper cites Design of a Multi- digit Binary-to-Ternary Converters Based on CNTFETs.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Design of a Multi- digit Binary-to-Ternary Converters Based on CNTFETs

Reference 4

Resolution: malformed identifier; doi_truncated, observed 2026-08-14T12:36:49.925948Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 03734103-68ed-4739-b712-f4ab6467029b · outbound

This paper cites Robust and energy-efﬁcient carbon nanotube FET- based MVL gates: A novel design approach.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Robust and energy-efﬁcient carbon nanotube FET- based MVL gates: A novel design approach

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.080217Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 9602dec6-78c2-4cd9-92ff-046ddc9a17af · outbound

This paper cites CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuit.

Ternary circuits: why R=3 is not the Optimal Radix for Computation CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuit

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.064697Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation b222f1ca-8205-4dc0-a623-0720b92da0fe · outbound

This paper cites High Performance Ternary Adder using CNTFET.

Ternary circuits: why R=3 is not the Optimal Radix for Computation High Performance Ternary Adder using CNTFET

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.051281Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation f8c08166-c795-4428-82cf-ae21832c431c · outbound

This paper cites Design of a ternary static memory cell using carbon nanotube based transistors.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Design of a ternary static memory cell using carbon nanotube based transistors

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.037781Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 9af4c101-6642-482d-a8fe-796017a4687a · outbound

This paper cites Comparison of binary and multivalued inte- grated circuits according to VLSI criteria.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Comparison of binary and multivalued inte- grated circuits according to VLSI criteria

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.022912Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 52ad7a8e-ea37-4c68-afc7-b63069203a50 · outbound

This paper cites Comparative Analysis of CNTFET and CMOS Logic Based Arithmetic Logic Unit.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Comparative Analysis of CNTFET and CMOS Logic Based Arithmetic Logic Unit

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:50.007708Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 7582e3e9-2265-4052-b2ae-692b2ed1071d · outbound

This paper cites A review of multiple-valued memory technology.

Ternary circuits: why R=3 is not the Optimal Radix for Computation A review of multiple-valued memory technology

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.857883Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation fbd9a51d-4fb2-4f1f-a0f6-59a277d8f452 · outbound

This paper cites A 16-level/Cell Dynamic Memory.

Ternary circuits: why R=3 is not the Optimal Radix for Computation A 16-level/Cell Dynamic Memory

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.861911Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ab41aea2-233e-4d6f-a052-1f200dead12c · outbound

This paper cites A 1 Gb DRAM for File Application.

Ternary circuits: why R=3 is not the Optimal Radix for Computation A 1 Gb DRAM for File Application

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.865877Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8e7f43bb-caf9-47f8-99f9-486b1667d5e9 · outbound

This paper cites A 4-level Storage 4Gb DRAM.

Ternary circuits: why R=3 is not the Optimal Radix for Computation A 4-level Storage 4Gb DRAM

Reference 14

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.870133Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ba9badbc-7627-4d10-a3fd-b10eea56ef09 · outbound

This paper cites A multilevel-Cell 32Mb Flash Memory.

Ternary circuits: why R=3 is not the Optimal Radix for Computation A multilevel-Cell 32Mb Flash Memory

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:49.959334Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Observation 8298ea7d-544a-4f43-adea-6130bde54fc8 · outbound

This paper cites Jung et al, ”A 3.3 V 128 Mb Multi-Level Flash Memory for Mass Storage Applications”, ISSCC Digest of Technical Papers, pp.32-33, Feb.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Jung et al, ”A 3.3 V 128 Mb Multi-Level Flash Memory for Mass Storage Applications”, ISSCC Digest of Technical Papers, pp.32-33, Feb

Reference 16

Resolution: unresolved; no resolver link, observed 2026-08-14T12:36:49.879387Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 1324e839-1a0b-4650-b48a-b67207f0c227 · outbound

This paper cites Etiemble, Why M-Valued Circuits are restricted to a Small Niche”, in Journal of Multiple Valued Logic and Soft Computing, V ol.

Ternary circuits: why R=3 is not the Optimal Radix for Computation Etiemble, Why M-Valued Circuits are restricted to a Small Niche”, in Journal of Multiple Valued Logic and Soft Computing, V ol

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-14T12:36:49.939117Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-16T06:30:59.297886+00:00.

Pith citing papers

No inbound Pith citation observations are available.