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Multi-level Memory-Centric Profiling on ARM Processors with ARM SPE

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arxiv 2410.01514 v1 pith:IIV6QLDG submitted 2024-10-02 cs.DC

classification cs.DC
keywords profilingmemorymemory-centricprocessorssamplingaccuracymulti-leveloverhead
verification ladder T0 review T1 audit T2 compute T3 formal

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High-end ARM processors are emerging in data centers and HPC systems, posing as a strong contender to x86 machines. Memory-centric profiling is an important approach for dissecting an application's bottlenecks on memory access and guiding optimizations. Many existing memory profiling tools leverage hardware performance counters and precise event sampling, such as Intel PEBS and AMD IBS, to achieve high accuracy and low overhead. In this work, we present a multi-level memory profiling tool for ARM processors, leveraging Statistical Profiling Extension (SPE). We evaluate the tool using both HPC and Cloud workloads on the ARM Ampere processor. Our results provide the first quantitative assessment of time overhead and sampling accuracy of ARM SPE for memory-centric profiling at different sampling periods and aux buffer sizes.

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