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C2HLSC: Can LLMs Bridge the Software-to-Hardware Design Gap?

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arxiv 2406.09233 v1 pith:JARKM3B7 submitted 2024-06-13 cs.AR

classification cs.AR
keywords codedesignhardwarellmsrefactoringaes-128algorithmassist
verification ladder T0 review T1 audit T2 compute T3 formal
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High Level Synthesis (HLS) tools offer rapid hardware design from C code, but their compatibility is limited by code constructs. This paper investigates Large Language Models (LLMs) for refactoring C code into HLS-compatible formats. We present several case studies by using an LLM to rewrite C code for NIST 800-22 randomness tests, a QuickSort algorithm and AES-128 into HLS-synthesizable c. The LLM iteratively transforms the C code guided by user prompts, implementing functions like streaming data and hardware-specific signals. This evaluation demonstrates the LLM's potential to assist hardware design refactoring regular C code into HLS synthesizable C code.

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Cited by 2 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. HLSDebugger: Identification and Correction of Logic Bugs in HLS Code with LLM Solutions

    cs.SE 2025-07 conditional novelty 6.0 of 10

    HLSDebugger fixes logic bugs in HLS code with 37.6% accuracy, outperforming GPT-4 by over 3x, using an encoder-decoder model trained on a new 300K-sample dataset.

  2. Iceberg: Enhancing HLS Modeling with Synthetic Data

    cs.LG 2025-07 conditional novelty 6.0 of 10

    Pretraining on LLM-generated HLS programs plus GNN weak labels reduces few-shot latency prediction error by 86% on six real-world applications.

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