Photonic Synapses with Hybrid Plasticity for Hardware-Level Neural Reuse

A hallmark of biological intelligence is neural reuse,the ability to preserve past learning and repurpose it for new tasks and changing environments. Photonic neural hardware offers high-bandwidth, low-latency computation, but current implementations remain constrained by fixed architectures and static weights, lacking the coexistence of transient dynamics and persistent weight storage. Here, we introduce integrated photonic synapses that realize what we term hybrid plasticity: the coexistence of weight retention and reversible updating within a single synaptic device made of thin-film lead zirconate titanate (PZT), thereby enabling hardware-level neural reuse. We use this hybrid plasticity to implement synaptic-weight encoding at picosecond timescales and experimentally grounded transfer-learning simulations. The resulting neural-reuse framework achieves more than 20-fold faster convergence and approximately 30-fold smaller weight updates than random initialization. These results advance photonic hardware toward efficient, memory-retaining on-chip learning.