Pith. sign in

REVIEW 1 cited by

Running Markov Chain Monte Carlo on Modern Hardware and Software

Not yet reviewed by Pith; the record is open.

Re-run · record.json Download PDF Read on arXiv ↗

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 2411.04260 v1 pith:R26DIW3I submitted 2024-11-06 stat.CO

Pavel Sountsov , Colin Carroll , Matthew D. Hoffman This is my paper · ORCID
classification stat.CO
keywords hardwaresomemcmccarlochainmarkovmontemuch
verification ladder T0 review T1 audit T2 compute T3 formal
0 comments
read the original abstract

Today, cheap numerical hardware offers huge amounts of parallel computing power, much of which is used for the task of fitting neural networks to data. Adoption of this hardware to accelerate statistical Markov chain Monte Carlo (MCMC) applications has been much slower. In this chapter, we suggest some patterns for speeding up MCMC workloads using the hardware (e.g., GPUs, TPUs) and software (e.g., PyTorch, JAX) that have driven progress in deep learning over the last fifteen years or so. We offer some intuitions for why these new systems are so well suited to MCMC, and show some examples (with code) where we use them to achieve dramatic speedups over a CPU-based workflow. Finally, we discuss some potential pitfalls to watch out for.

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. MC$^2$A: Enabling Algorithm-Hardware Co-Design for Efficient Markov Chain Monte Carlo Acceleration

    cs.LG 2025-07 conditional novelty 6.0 of 10

    A proposed programmable MCMC accelerator using a reconfigurable Gumbel-max sampler and a 3D roofline design tool claims speedups of 307.6x, 1.4x, 2.0x, and 84.2x over CPU, GPU, TPU, and a prior MCMC ASIC.

Pith tools