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REVIEW 3 major objections 4 minor 39 references

Who Needs DRAM? We Have Fiber

T0 review · 3 major / 4 minor · reviewed 2026-07-10 · grok-4.5

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Pith's one-line read Datacenter fiber can serve as recirculating delay-line memory for LLM weights, cutting weight-delivery energy more than 70% versus HBM3e while eliminating redundant DRAM copies across thousands of accelerators.

desk verdict Solid first-order architecture paper: the MCF-ring + passive-tap + CPO-to-systolic idea for immutable LLM weights is new and the arithmetic is clean, but the 72% energy headline is an artifact of continuous-peak utilization and unproven OSNR regeneration. read the letter →

arxiv 2607.08407 v1 pith:RT75YJ4D submitted 2026-07-09 cs.AR cs.DCcs.ETcs.NI

Hannah Atmer , Thiemo Voigt , Yuan Yao , Stefanos Kaxiras This is my paper · ORCID
classification cs.ARcs.DCcs.ETcs.NI
keywords FiberMemorydelay-lineLLMinferencemulti-coreco-packagedopticsHBMenergyopticalbroadcastdata-centerarchitecture
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Modern AI clusters waste enormous energy and DRAM capacity by storing identical model weights at every accelerator and repeatedly fetching them. This paper argues that the optical fiber already present in a hyperscale data center can be turned into an active delay-line memory: a multi-core fiber loop that continuously recirculates the immutable weights past every node. Nodes passively tap a tiny fraction of the light, so a single central transmitter replaces thousands of local HBM stacks. Using multi-core fibers, asymmetric optical taps, co-packaged receivers, and regional all-optical amplifiers and regenerators, a 1,000 km loop holds a 70 GB INT8 Llama-3-70B model plus timing slack and can feed 10,000 accelerators at HBM-class bandwidth. The case study projects a drop from 1,024 kW to roughly 285 kW for weight delivery and removes the need to store 700 TB of replicated weights. If the optical noise and packaging assumptions hold, the architecture would free DRAM capacity and power for the activations and KV cache that actually change during inference.

What carries the argument

The data-parallel optical broadcast delay-line: a 14-cable, 19-core multi-core fiber ring that stores 128 GB in flight at 25.6 TB/s, combined with 1:99 passive tap-and-amplify interfaces and regional PDFAs plus all-optical 2R regenerators that keep the circulating stream readable without electronic conversion at every hop.

What would settle it

Build a laboratory-scale multi-core O-band loop with the proposed tap density and measure whether OSNR stays above roughly 15 dB for 50 Gbaud PAM4 after twenty 50 km stages plus 1:99 chassis taps, or whether regenerator power and latency erase the projected energy advantage.

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Extended reading notes

Core claim

Fiber Memory can eliminate redundant weight storage across 10,000 AI accelerators and reduce weight-delivery energy by over 70 percent (284.8 kW versus 1,024 kW) relative to HBM3e by streaming a full Llama-3-70B INT8 model plus slack continuously through a 1,000 km multi-core fiber ring that every chassis passively taps.

Load-bearing premise

The claim rests on cascaded O-band amplifiers and regional all-optical regenerators keeping the optical signal clean enough for high-speed PAM4 after many kilometers and many tiny taps; if noise grows faster or regenerators cost too much power, continuous recirculation fails.

Editorial extensions

If this is right

  • Identical LLM weights need be stored and powered only once instead of once per accelerator, freeing hundreds of terabytes of HBM/DRAM capacity cluster-wide.
  • Weight-delivery power for a 10,000-accelerator inference farm falls from over a megawatt to under 300 kW under the paper's numbers.
  • Activations and KV cache remain the only data that must live in local high-bandwidth memory, shrinking the memory hierarchy for inference.
  • Larger models are accommodated simply by lengthening the fiber loop and adding more amplifiers rather than by adding more HBM stacks.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the optical budget holds, the same ring could later carry immutable embeddings, codebooks, or frozen expert weights for mixture-of-experts models without further DRAM growth.
  • The architecture implicitly pressures vendors to treat co-packaged optics and multi-core fiber as first-class memory interfaces rather than mere interconnects.
  • A natural next measurement is whether residual bit flips that FEC leaves in the weight payload are absorbed by the known noise tolerance of quantized LLMs, further relaxing regenerator spacing.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 4 minor

Summary. The paper proposes Fiber Memory: a recirculating optical delay-line architecture that stores immutable LLM weights in flight inside multi-core fiber loops and broadcasts them via passive 1:99 tap-and-amplify interfaces and co-packaged optics to thousands of accelerators. A Llama-3-70B INT8 case study (10 000 accelerators, 1 000 km of 19-core MCF, 25.6 TB/s aggregate) claims elimination of 700 TB of redundant HBM weight storage and a 72.1 % reduction in weight-delivery power (284.8 kW versus 1 024 kW) relative to continuous-peak HBM3e fetches. Supporting calculations cover bandwidth-delay product, O-band DWDM, PDFA amplification, regional all-optical 2R regeneration, and direct-detection receiver energy.

Significance. If the physical and utilization assumptions hold, the work would reframe hyperscale AI memory as a shared optical resource rather than per-node HBM, offering a concrete path to cut both capital DRAM demand and dynamic energy for weight delivery. The architecture is novel in combining space-division multiplexed MCF rings, asymmetric passive taps, CPO direct feed into systolic arrays, and Streamed Weight Packets. The quantitative case study is transparent about component power numbers and free parameters, making the claim falsifiable and a useful first-order feasibility study even if later refined.

major comments (3)
  1. Section 4.0.4 (Eq. 9) and the subsequent comparison compute P_HBM under continuous peak-bandwidth utilization (10 000 × 25.6 Tb/s × 4 pJ/bit = 1 024 kW) while Fiber Memory’s dominant terms (lasers 4.1 kW, loop PDFAs 7 kW, pod amplifiers/regenerators 94.5 kW) are largely static. The text acknowledges micro-stalls yet still reports a 72.1 % saving against this theoretical maximum and omits HBM static leakage. A utilization-aware model or sensitivity sweep over realistic duty cycles (e.g., u = 0.3–0.7 typical of memory-bound decoding) is required; otherwise the headline energy claim is an artifact of the continuous-peak assumption rather than a robust system property.
  2. Section 5 presents an approximate OSNR formula and asserts that regional all-optical 2R regenerators (cross-phase modulation in SOA or HNLF) fully reset OSNR after twenty 50 km stages plus 1:99 chassis taps, keeping the signal above the ~15 dB threshold for 50 Gbaud PAM4. No numerical evaluation of the cascaded OSNR, regenerator insertion loss, residual noise, or power/latency overhead is supplied. Because continuous recirculation and the energy budget both rest on this reset working with negligible cost, a quantitative noise-budget calculation (or citation of measured 2R performance under the stated O-band multi-wavelength conditions) is load-bearing.
  3. Sections 2.3 and 3.2 claim that co-packaged optics can feed raw weight parameters “directly to the systolic array registers” with “no electronic buffering” and that Streamed Weight Packets eliminate address translation. Real CPO receivers still require CDR, deserialization, FEC decoding, and clock-domain crossing before data can be presented to compute registers. The 0.7 pJ/bit receiver figure (Eq. 13) and the zero-buffering energy claim therefore need either a concrete micro-architecture sketch showing how these functions are absorbed without intermediate storage or an explicit residual energy/latency term.
minor comments (4)
  1. Figure 1 and the accompanying text describe a ring-and-pod topology; a short table listing total fiber length, number of spools, cores, and wavelengths would make the physical dimensioning easier to verify.
  2. The 45 % slack/replica fraction is introduced without a derivation of how much slack is required for typical KV-cache or batch-size jitter; a one-sentence bound would strengthen Section 3.3.
  3. Several references (e.g., [26], [12], [9]) appear as 2025–2026 preprints or product briefs; ensuring stable DOIs or arXiv identifiers would improve long-term citability.
  4. Typographical inconsistencies appear (e.g., “butfar worse”, mixed use of TB/s vs Tb/s in prose). A light copy-edit pass would help.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: energy and capacity claims are direct arithmetic from stated design parameters and external literature constants, not reductions of inputs by construction.

full rationale

The paper's load-bearing quantitative claims (BDP capacity M = B imes L / v yielding 128 GB for the 1000 km / 25.6 TB/s loop; P_HBM = 10 000 imes 25.6 Tb/s imes 4.0 pJ/bit = 1024 kW; fiber-side sum of lasers + PDFAs + regenerators + receivers = 284.8 kW; 72.1 % reduction) are obtained by substituting explicitly chosen architectural numbers (14 imes 19-core MCF, 8 DWDM channels at 100 Gb/s, 1:99 taps, 125 pods, etc.) into standard formulas and literature energy figures. No parameter is fitted to a target quantity that is later re-presented as a prediction; no uniqueness theorem or ansatz is imported from the authors' own prior work; the derivation chain does not close on itself. The continuous-peak utilization assumption affects absolute numbers but is an open modeling choice, not a circular definition. The architecture is therefore self-contained against its own inputs.

Assumptions & free parameters 6 free parameters · 6 assumptions · 2 invented entities

The central energy and capacity claims rest on a large set of literature-derived component numbers treated as fixed, plus several architectural design choices (loop length, core count, slack fraction) chosen to make the 128 GB capacity and 3.2 TB/s per-accelerator bandwidth match H100-class HBM. No free parameters are fitted to new experimental data; the paper is pure analytical case study. Invented entities are the system architecture itself and its packet format.

free parameters (6)
  • HBM3e energy per bit = 4.0 pJ/bit
    Taken as 4.0 pJ/bit from citation [15]; directly multiplies into the 1024 kW baseline.
  • IM-DD receiver energy per bit = 0.7 pJ/bit
    Taken as 0.7 pJ/bit from citation [2]; multiplies into the 179 kW receiver term.
  • PDFA electrical power = 25 W
    25 W per amplifier from citations; used for both loop and pod amplifiers.
  • DFB laser wall-plug efficiency and optical power = 5%, 100 mW
    5% efficiency and 100 mW optical chosen from [11]; yields 4.1 kW central lasers.
  • Slack / replica fraction = up to 45%
    Up to 45% of the 128 GB capacity reserved for timing slack and interleaving; design choice that reduces effective model capacity.
  • Loop length and spool stages = 1000 km / 20 stages
    1000 km composed of 20 x 50 km stages chosen so that BDP exactly equals 128 GB at 25.6 TB/s.
assumptions (6)
  • domain assumption Group velocity in silica fiber is c/1.5 = 200 km/ms
    Standard refractive-index value used for all delay and capacity calculations (Eq. 1).
  • domain assumption O-band attenuation is 0.32 dB/km and 1:99 tap insertion loss is 0.043 dB
    Taken from fiber and splitter literature; used to size PDFA gain and count.
  • domain assumption PDFAs are immune to inter-channel cross-gain modulation because of long upper-state lifetime
    Cited from PDFA literature; justifies multi-wavelength amplification without SOAs.
  • domain assumption LLM weight traffic is 90-99% of memory bandwidth for typical batch sizes
    Taken from DeepSpeed-Inference citation; justifies streaming only weights while keeping activations local.
  • ad hoc to paper All-optical 2R regenerators fully reset OSNR without electrical conversion
    Assumed in Section 5 so that noise does not accumulate beyond the 15 dB PAM4 threshold after many stages.
  • domain assumption Direct-detection 50 Gbaud PAM4 over 1000 km is feasible inside the O-band zero-dispersion window with 100 GHz DWDM
    Used to avoid coherent DSP power; rests on cited dispersion and PAM4 OSNR numbers.
invented entities (2)
  • Fiber Memory architecture (MCF ring + pod + asymmetric tap-and-amplify + CPO direct feed)
    purpose: Provides the recirculating broadcast medium that replaces local HBM for immutable weights.
    The concrete system organization is introduced by the paper; no prior identical design is cited.
  • Streamed Weight Packets (SWPs) with preamble, FEC header, unrolled payload, CRC
    purpose: Structures the continuous optical stream so systolic arrays can consume weights without address translation or buffering.
    Packet format and unrolling strategy are defined for this architecture.

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Cite this review

Pith. "Pith review of Who Needs DRAM? We Have Fiber." pith.science (2026). https://pith.science/paper/RT75YJ4D

@misc{pith2026260708407,
  author       = {Pith},
  title        = {Pith review of: Who Needs DRAM? We Have Fiber},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/RT75YJ4D}},
  note         = {Machine review of arXiv:2607.08407}
}
read the original abstract

The rising pressure on DRAM availability and contract pricing reflects generative AI's massive high-performance memory requirements. This pressure is heavily compounded by hyperscale data center expansion, which now consumes a significant portion of global DRAM output. In this work, we propose a new architecture: Fiber Memory, which reimagines the role of optical fiber in a hyperscale data center, deploying it as an active, recirculating delay-line memory for immutable data, such as large language model (LLM) weights. We present a data-parallel optical broadcast delay-line memory architecture that accounts for fiber's physical realities. By incorporating space-division multiplexed multi-core fibers (MCFs), passive optical tap-and-amplify interfaces, co-packaged optics (CPO), and regional all-optical regeneration, our case study evaluation demonstrates that Fiber Memory can eliminate redundant weight storage across 10,000 AI accelerators and reduce weight-delivery energy by over 70% compared to traditional HBM3e configurations.

Figures

Figures reproduced from arXiv: 2607.08407 by the authors.

Figure 1
Figure 1. Ring and Pod Architecture. The weights server injects model parameters into a wavelength￾multiplexed 19-core MCF ring. Regional splitters broadcast the signal to independent pods, minimiz￾ing cumulative losses and local transceiver overhead. 99:1 Optical Splitter 100-Accelerator Pod 99:1 Optical Splitter Optional 2R O-E-O Repeater PDFA Optical Amplifiers 100-Accelerator Pod 1x100 Splitter 1% 99% 1x100 Splitter 99% 1… view at source ↗
Figure 2
Figure 2. Asymmetric Tap-and-Amplify Receiver Schematic. The passive 1 : 99 tap extracts 1% of the signal power for local execution while letting 99% pass through. Regional PDFAs restore signal amplitude at the Pod-level, minimizing active component counts. While this example demonstrates the baseline potential of a single fiber strand, our complete Fiber Memory archi￾tecture aggregates bundles of multi-core cables to achieve… view at source ↗
Figure 3
Figure 3. Co-Packaged Optics (CPO) accelerator inte [PITH_FULL_IMAGE:figures/full_fig_p003_3.png] view at source ↗
Figures from the paper (1 more)
Figure 4
Figure 4. Figure 4: Structure of a streamed weight packet. The [PITH_FULL_IMAGE:figures/full_fig_p004_4.png]

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