Paper Citation Record · LEDGER

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver

As of 12 August 2026, this Paper Citation Record lists 33 of 33 outbound references and 0 inbound Pith citation observations for arXiv:2412.06330.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2412.06330 v2

Coverage vector

measured 33 of 33 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-11T19:50:48.679430Z

measured 33 of 33 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-12T06:34:41.77262+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

33 of 33 outbound references displayed

verified exact12
verified fuzzy0
unresolved14
parse uncertain0
malformed identifier2
metadata mismatch5

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation 8ea4062c-727a-45d1-8898-1f7559ce12cc · outbound

This paper cites Microwave The- ory Tech.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Microwave The- ory Tech

Reference 1

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.602556Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation acb5b27b-6dcb-4345-9b14-5f8a02dd63ac · outbound

This paper cites Solid-State Circuits 50.11 (2015) 2665-2677 (DOI: 10.1109/JSSC.2015.2472599).

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Solid-State Circuits 50.11 (2015) 2665-2677 (DOI: 10.1109/JSSC.2015.2472599)

Reference 2

Resolution: metadata mismatch; raw_fallback, observed 2026-08-11T19:50:50.557664Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 97848849-2d02-44fc-97d2-4f948fa2c87f · outbound

This paper cites Selection of Ampliﬁer for Optimized Charge Transfer in Active Pixel CMOS Time of Flight (TOF) Image Sensors.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Selection of Ampliﬁer for Optimized Charge Transfer in Active Pixel CMOS Time of Flight (TOF) Image Sensors

Reference 3

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.790647Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 554250f4-b028-4f9b-b7e5-65a18c008800 · outbound

This paper cites Express 20.13 (2023) 20230133 (DOI: 10.1587/elex.20.20230133).

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Express 20.13 (2023) 20230133 (DOI: 10.1587/elex.20.20230133)

Reference 4

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.783152Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation b84c7428-b0a6-489f-b4f3-9749ba016746 · outbound

This paper cites An ULP Capacitor-DAC-Based Constant-Slope Digital-to-Time Co nverter.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver An ULP Capacitor-DAC-Based Constant-Slope Digital-to-Time Co nverter

Reference 5

Resolution: malformed identifier; no resolver link, observed 2026-08-11T19:50:48.613048Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2665fec5-3324-4802-9a2c-b8fa93b0390a · outbound

This paper cites A Neural Stimulator Frontend With High-Voltage Compliance and Pr o- grammable Pulse Shape for Epiretinal Implants.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Neural Stimulator Frontend With High-Voltage Compliance and Pr o- grammable Pulse Shape for Epiretinal Implants

Reference 6

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.615335Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 341a2b28-ef5a-4e08-91d3-01370408c70d · outbound

This paper cites Solid-State Circuits 55.7 (2020) 1830-1841 (DOI: 10.1109/ESS- CIRC.2019.8902912).

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Solid-State Circuits 55.7 (2020) 1830-1841 (DOI: 10.1109/ESS- CIRC.2019.8902912)

Reference 7

Resolution: malformed identifier; no resolver link, observed 2026-08-11T19:50:48.617892Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0337aac5-434a-41b8-8e20-e52dd94c4555 · outbound

This paper cites Solid-State Circuits 55.12 (2020) 3414-3425 (DOI: 10.1109/JSSC.2020.3024973).

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Solid-State Circuits 55.12 (2020) 3414-3425 (DOI: 10.1109/JSSC.2020.3024973)

Reference 8

Resolution: metadata mismatch; raw_fallback, observed 2026-08-11T19:50:50.054615Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation c99d8dc6-3971-42ba-950e-d30319526e44 · outbound

This paper cites Overview of Sub-Terahertz Communication a nd 300GHz CMOS Transceivers.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Overview of Sub-Terahertz Communication a nd 300GHz CMOS Transceivers

Reference 9

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.776221Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 715ec39d-8bf0-46af-a6db-ca30959c998f · outbound

This paper cites A Low Power All-Digital PLL With -40dBc In-Band Fractional Spur S uppression for NB-IoT Applications.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Low Power All-Digital PLL With -40dBc In-Band Fractional Spur S uppression for NB-IoT Applications

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.624148Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7e797079-2d07-480c-9bcb-21360511b3c4 · outbound

This paper cites Solid-State Circuits 54.11 (2019) 3149-3160 (DOI: 10.1109/CICC.2019.8780235).

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Solid-State Circuits 54.11 (2019) 3149-3160 (DOI: 10.1109/CICC.2019.8780235)

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.626228Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation a2d92e2b-75b8-44e5-881b-305bc05bce6a · outbound

This paper cites DTC Linearization via Mismatch-Noise Cancellation for Digital Fract ional-N PLLs.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver DTC Linearization via Mismatch-Noise Cancellation for Digital Fract ional-N PLLs

Reference 12

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.628291Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3a872e90-36cc-43e5-a866-9570a225f7f6 · outbound

This paper cites A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an I nverse- Constant-Slope DTC and FCW Subtractive Dithering.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Low-Spur and Low-Jitter Fractional-N Digital PLL Based on an I nverse- Constant-Slope DTC and FCW Subtractive Dithering

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.630647Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 006b15f5-eade-4c64-802c-e2856ae4662b · outbound

This paper cites A Low-Noise Fractional- N Digital Frequency Synthesizer With Imp licit Fre- quency Tripling for Mm-Wave Applications.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Low-Noise Fractional- N Digital Frequency Synthesizer With Imp licit Fre- quency Tripling for Mm-Wave Applications

Reference 14

Resolution: metadata mismatch; raw_fallback, observed 2026-08-11T19:50:49.624795Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 5540da4a-74f5-4580-9e26-a51d0c5ba699 · outbound

This paper cites Observation of Parity-Time Symmetry Breaking in a Single-Spin Sys tem.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Observation of Parity-Time Symmetry Breaking in a Single-Spin Sys tem

Reference 15

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.634858Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation abbe3266-dee3-44ac-a324-4326fc92fa01 · outbound

This paper cites Multipartite Entanglement Among Single Spins in Diamond.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Multipartite Entanglement Among Single Spins in Diamond

Reference 16

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.764976Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation a6e44b96-e189-4340-84f9-1630ca09a26f · outbound

This paper cites Simultaneous Classical Co mmunication and Quantum Key Distribution Based on Gaussian Modulated Coherent States.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Simultaneous Classical Co mmunication and Quantum Key Distribution Based on Gaussian Modulated Coherent States

Reference 17

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.756273Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 204a6342-b415-4210-a25f-a81ffeaf37b4 · outbound

This paper cites Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-Nm CMO S.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-Nm CMO S

Reference 18

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.641443Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2c13a572-3c38-489c-b8c9-97c1b978eac7 · outbound

This paper cites A 10-Bit 563-Fs Step Constant-Slope Digital-to-Time Converter in 40-Nm CMOS With Nonlinearity Cancellation and Range Extension Techniques.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A 10-Bit 563-Fs Step Constant-Slope Digital-to-Time Converter in 40-Nm CMOS With Nonlinearity Cancellation and Range Extension Techniques

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.643608Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 6b0976ec-5f71-4162-8ed7-3f7c3bb7520f · outbound

This paper cites A High-Linearity Digital-to-Time Converter Technique: Constant -Slope Charging.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A High-Linearity Digital-to-Time Converter Technique: Constant -Slope Charging

Reference 20

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.646053Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation aa86ef15-f661-4d95-ba35-ce01a45be9d2 · outbound

This paper cites A 31- u W, 148-Fs Step, 9-Bit Capacitor-DAC-Based Constant- Slope Digital- to-Time Converter in 28-nm CMOS.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A 31- u W, 148-Fs Step, 9-Bit Capacitor-DAC-Based Constant- Slope Digital- to-Time Converter in 28-nm CMOS

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.648705Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d2caf4ca-6088-4477-bd12-b713bca7d874 · outbound

This paper cites Design of Time Interval Generator Based on Hybrid Counting Met hod.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Design of Time Interval Generator Based on Hybrid Counting Met hod

Reference 22

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.748763Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 8b39aa69-b3c8-49d9-bc15-d862842c15c0 · outbound

This paper cites Eight-Channel Fully Adjustable Pulse Generator.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Eight-Channel Fully Adjustable Pulse Generator

Reference 23

Resolution: metadata mismatch; raw_fallback, observed 2026-08-11T19:50:49.134293Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 7bb40cf7-f5aa-4c45-8522-5462ccb6d6f8 · outbound

This paper cites A Simple Field Programmable Gate Array (FPGA) Based High Precision Low- Jitter Delay Generator.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Simple Field Programmable Gate Array (FPGA) Based High Precision Low- Jitter Delay Generator

Reference 24

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.742360Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 118cf7c2-9a3a-48fc-aa62-d1fbe548a661 · outbound

This paper cites High-Resolution Digital-to-Time Converter Implemented in an FPGA Chip.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver High-Resolution Digital-to-Time Converter Implemented in an FPGA Chip

Reference 25

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.658971Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0fd107b0-88f5-4242-8ae9-e51503d4b611 · outbound

This paper cites A High Resolution Vernier Digital-to-Time Converter Implemented w ith 65 Nm FPGA.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A High Resolution Vernier Digital-to-Time Converter Implemented w ith 65 Nm FPGA

Reference 26

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.731364Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 35e0c3b4-3378-48b1-af2b-93e22d48f742 · outbound

This paper cites A High-Resolution Programmable Vernier Delay Generator Based o n Carry Chains in FPGA.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A High-Resolution Programmable Vernier Delay Generator Based o n Carry Chains in FPGA

Reference 27

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.724582Z

Source-reported events for the cited work

correction dated 2019-10-29. Source: crossref record 10.1063/1.5130761->10.1063/1.4985542:correction, observed 2026-07-11T03:01:59.433885+00:00. This notice travels one citation hop only.

Observation 357507fd-83a4-4a07-a349-eaae953fa5ee · outbound

This paper cites Digital-to-Time Converter with P ulse Train Generation Capabil- ity.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Digital-to-Time Converter with P ulse Train Generation Capabil- ity

Reference 28

Resolution: metadata mismatch; raw_fallback, observed 2026-08-11T19:50:49.055089Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 8ca84190-ebf1-4613-8a27-47e926663516 · outbound

This paper cites Digital-to-Time Converter for Test Equipment Implemented Using FPGA DSP Blocks.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Digital-to-Time Converter for Test Equipment Implemented Using FPGA DSP Blocks

Reference 29

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.669215Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bec47950-463d-477d-b97a-272e98b3265c · outbound

This paper cites A Pico-Second Resolution Arbitrary Timing Generator Based on Tim e Folding and Time Interpolating.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Pico-Second Resolution Arbitrary Timing Generator Based on Tim e Folding and Time Interpolating

Reference 30

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.717693Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 77497961-2206-4d4e-9c7a-03dfa0e7c6ff · outbound

This paper cites A Field-Programmable-Gate-Array Based High Time Resolution Arb itrary Timing Generator with a Time Folding Method Utilizing Multiple Carry-Chains.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver A Field-Programmable-Gate-Array Based High Time Resolution Arb itrary Timing Generator with a Time Folding Method Utilizing Multiple Carry-Chains

Reference 31

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.710877Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Observation 97ba9c27-e89e-41b2-82fb-6c35f0c10e26 · outbound

This paper cites an unresolved cited work.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Unresolved cited work

Reference 32

Resolution: unresolved; no resolver link, observed 2026-08-11T19:50:48.676916Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d8e67b16-49be-4f64-894b-1b3fb5605d51 · outbound

This paper cites an unresolved cited work.

A reconfigurable calibration-free digital-to-time converter based on a high-speed transceiver Unresolved cited work

Reference 33

Resolution: verified exact; doi, observed 2026-08-11T19:50:48.702232Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-12T06:34:41.77262+00:00.

Pith citing papers

No inbound Pith citation observations are available.