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arxiv: 2605.17521 · v1 · pith:SCYFVXPNnew · submitted 2026-05-17 · 📡 eess.SP

FPGA-Based Experimental Analysis of Fixed-Point Precision Impact on SOP Estimation in Coherent Communications Receivers

Geraldo Gomes , Rafael Vieira , Hani Kbashi , Aleksandr Donodin , Shekhar Saxena , Stylianos Sygletos , Ian Phillips , Jaroslaw E. Prilepsky
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Mikael Mazur Sergei K. Turitsyn Pedro Freire
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Pith reviewed 2026-05-19 22:42 UTC · model grok-4.3

classification 📡 eess.SP
keywords fixed-point precisionMIMO equalizerFPGA implementationcoherent optical receiverstate of polarization estimationnoise floorangular errorhardware complexity
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The pith

At 7-bit fixed-point precision the noise floor drops 100x and angular error 63% in FPGA MIMO equalizers for coherent receivers, yet communication performance saturates as hardware complexity grows.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The paper experimentally tests how fixed-point word length in an FPGA MIMO equalizer affects state-of-polarization estimation inside coherent optical receivers. It shows that moving from higher to 7-bit precision produces a hundredfold drop in noise floor and a 63 percent reduction in angular error, but further bits bring no additional communication gain while raising resource use. A reader cares because this identifies a practical operating point where sensing accuracy improves without wasting silicon or power in real-time hardware implementations.

Core claim

The central claim is that an experimental FPGA implementation of a fixed-point MIMO equalizer reaches a sweet spot at 7-bit precision: the noise floor falls by a factor of 100 and angular error falls by 63 percent relative to lower precision, yet bit-error-rate and other communication metrics stop improving while slice count, power, and latency continue to rise.

What carries the argument

Fixed-point precision MIMO equalizer on FPGA, which quantizes the digital signal processing chain that estimates state of polarization and compensates impairments in the coherent receiver.

If this is right

  • Receiver designers can stop at 7 bits without losing communication performance.
  • Further increases in precision only raise hardware cost without improving bit-error rate.
  • Power and area budgets can be allocated to other blocks once 7-bit quantization is set.
  • The same precision sweet spot may appear in related digital equalizers inside the receiver.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • Similar saturation points could be measured for other DSP blocks such as carrier recovery or timing recovery.
  • The result suggests a general rule for choosing word length in real-time optical DSP to minimize energy per bit.
  • Extending the test to bursty or nonlinear channels would check whether the 7-bit point remains optimal.

Load-bearing premise

The FPGA board, measurement setup, and test channels isolate the effects of word-length quantization from calibration drift, other circuit imperfections, or particular fiber conditions.

What would settle it

Re-running the same receiver chain on a different FPGA family or at a new wavelength while recording that error-rate continues to fall beyond 7 bits would falsify the saturation claim.

Figures

Figures reproduced from arXiv: 2605.17521 by Aleksandr Donodin, Geraldo Gomes, Hani Kbashi, Ian Phillips, Jaroslaw E. Prilepsky, Mikael Mazur, Pedro Freire, Rafael Vieira, Sergei K. Turitsyn, Shekhar Saxena, Stylianos Sygletos.

Figure 1
Figure 1. Figure 1: Sketch of the experimental setup: DP-QPSK communication; input vibration from loudspeaker; DSP with CMA used for SOP vibration [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: a) FPGA resources used for each bit precision b) FPGA chip area required for 5 and 8 bits resolution. c) FPGA CMA output for 5 and [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Waveform for stokes parameter S2 for each value of bit precision, the quantization-like noise decreases with increasing bit precision. Poincare sphere trajectory for 5-bit precision (communication optimum [ ´ 5]) and for 8-bit precision (minimum quantization-like noise). In￾creasing bit precision leads to better-defined SOP trajectories [PITH_FULL_IMAGE:figures/full_fig_p002_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Angular RMS error and Q-Factor for each value of bit precision, minimum value of angular RMSE for 7-bit precision. Power spectral [PITH_FULL_IMAGE:figures/full_fig_p003_4.png] view at source ↗
read the original abstract

We experimentally evaluated the sensing-communication trade-off from the fixed-point precision MIMO equalizer using FPGA. At 7-bit, noise floor drops 100x and angular error 63%, but the communication performance saturates while the hardware complexity rises.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

2 major / 2 minor

Summary. The paper reports an FPGA-based experimental campaign evaluating the impact of fixed-point word length in a MIMO equalizer on SOP estimation within a coherent optical receiver. The central claim is that reducing precision to 7 bits yields a 100x drop in noise floor and 63% reduction in angular error, after which communication performance saturates while hardware complexity continues to rise.

Significance. If the isolation of quantization effects is demonstrated, the work supplies concrete, hardware-validated guidance on precision-complexity trade-offs for coherent DSP, a topic of direct interest to high-speed optical transceiver designers. The FPGA platform and explicit sensing-communication framing are positive features.

major comments (2)
  1. [Abstract and §4] Abstract and §4 (Experimental Results): the headline quantitative claims (100x noise-floor reduction and 63% angular-error reduction at 7 bits) are stated without error bars, number of independent trials, or description of the statistical procedure used to obtain them. This directly undermines in the saturation claim.
  2. [§3 and §4] §3 (FPGA Implementation) and §4: the measurement campaign does not describe control runs that freeze all other DSP blocks (ADC interface, frequency-offset compensation, carrier recovery) while sweeping only the MIMO equalizer word length. Without such isolation, the observed 100x noise-floor improvement cannot be attributed solely to the 7-bit choice.
minor comments (2)
  1. [Abstract] The abstract would benefit from stating the modulation format, symbol rate, and fiber length used in the experiments.
  2. [Figures] Figure captions should explicitly label which curves correspond to which fixed-point widths and whether they include or exclude the equalizer block.

Simulated Author's Rebuttal

2 responses · 0 unresolved

We thank the referee for the constructive comments, which help clarify the presentation of our experimental results. We address each major comment below and have revised the manuscript to improve clarity and rigor where the concerns are valid.

read point-by-point responses

  1. Referee: [Abstract and §4] Abstract and §4 (Experimental Results): the headline quantitative claims (100x noise-floor reduction and 63% angular-error reduction at 7 bits) are stated without error bars, number of independent trials, or description of the statistical procedure used to obtain them. This directly undermines in the saturation claim.

    Authors: We acknowledge that the abstract and Section 4 report the 100x noise-floor reduction and 63% angular-error reduction without error bars or explicit details on the number of independent trials and statistical procedures. This omission weakens the presentation of the saturation claim. In the revised manuscript we will add error bars computed from repeated independent FPGA runs, state the number of trials performed, and describe the averaging and reduction calculation procedure. These additions will be placed in both the abstract and Section 4. revision: yes

  2. Referee: [§3 and §4] §3 (FPGA Implementation) and §4: the measurement campaign does not describe control runs that freeze all other DSP blocks (ADC interface, frequency-offset compensation, carrier recovery) while sweeping only the MIMO equalizer word length. Without such isolation, the observed 100x noise-floor improvement cannot be attributed solely to the 7-bit choice.

    Authors: We agree that explicit isolation of the MIMO equalizer precision is required to attribute the observed improvements solely to the 7-bit word length. Our FPGA testbed was configured to hold all other DSP blocks (ADC interface, frequency-offset compensation, and carrier recovery) at fixed parameters while only the MIMO equalizer fixed-point width was swept. We did not, however, document these control conditions with sufficient detail in Sections 3 and 4. The revised manuscript will add a dedicated paragraph describing the frozen parameters and confirming that only the equalizer precision was varied across the reported measurements. revision: yes

Circularity Check

0 steps flagged

No circularity: purely experimental measurement campaign

full rationale

The paper reports direct FPGA hardware measurements of fixed-point precision effects on MIMO equalizer performance in a coherent receiver, including observed changes in noise floor and angular error at 7-bit precision. No mathematical derivations, equations, fitted parameters, or predictions are presented that could reduce to inputs by construction. The work is self-contained as an experimental evaluation against external hardware benchmarks, with results obtained from physical implementation rather than any self-referential or fitted logic.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

Review is based solely on the abstract; no free parameters, axioms, or invented entities are described in the provided text.

pith-pipeline@v0.9.0 · 5600 in / 1085 out tokens · 36811 ms · 2026-05-19T22:42:16.103710+00:00 · methodology

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Lean theorems connected to this paper

Citations machine-checked in the Pith Canon. Every link opens the source theorem in the public Lean library.

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Reference graph

Works this paper leans on

12 extracted references · 12 canonical work pages

  1. [1]

    Mecozzi et al., ``Polarization sensing using submarine optical cables,'' Optica 8, 788-795 (2021)

    A. Mecozzi et al., ``Polarization sensing using submarine optical cables,'' Optica 8, 788-795 (2021)

    work page 2021

  2. [2]

    Mazur et al., ``Submarine Cable Deep-Ocean Observation of Mega-Thrust Earthquake and Tsunami with 44,000 100-m Spaced Sensors,`` arXiv:2509.24813

    M. Mazur et al., ``Submarine Cable Deep-Ocean Observation of Mega-Thrust Earthquake and Tsunami with 44,000 100-m Spaced Sensors,`` arXiv:2509.24813

    work page arXiv

  3. [3]

    Optical polarization–based seismic and water wave sensing on transoceanic cables

    Z. Zhanet al., "Optical polarization–based seismic and water wave sensing on transoceanic cables." Science 371.6532 (2021): 931-936

    work page 2021

  4. [4]

    Mazuret al., ``Transoceanic phase and polarization fiber sensing using real-time coherent transceiver,'' OFC, Optica, 2022, p

    M. Mazuret al., ``Transoceanic phase and polarization fiber sensing using real-time coherent transceiver,'' OFC, Optica, 2022, p. M2F.2

    work page 2022

  5. [5]

    Kikuchi, ``Performance analyses of polarization demultiplexing based on constant-modulus algorithm in digital coherent optical receivers,'' Opt

    K. Kikuchi, ``Performance analyses of polarization demultiplexing based on constant-modulus algorithm in digital coherent optical receivers,'' Opt. Express 19, 9868-9880 (2011)

    work page 2011

  6. [6]

    H. M. Chin et al., ``Fixed point precision requirements of the CMA for digital coherent access'' 2012 IPC, 2012, pp. 453-454

    work page 2012

  7. [7]

    R. A. Shafik et al., ``On the extended relationships among EVM, BER and SNR as performance metrics,'' 4th International Conference on Electrical and Computer Engineering, IEEE, 2006, pp. 408-411

    work page 2006

  8. [8]

    Carena, et al

    A. Carena, et al. ``Coherent polarization-multiplexed formats: Receiver requirements and mitigation of fiber non-linear effects,'' ECOC, 2010, pp. 1-6

    work page 2010

  9. [9]

    S. Zhang et al., ``ADC bandwidth optimization in coherent optical polarization multiplexing quadrature phase-shift keying system,'' Asia Communications and Photonics conference and Exhibition, 2009, pp. 1-6

    work page 2009

  10. [10]

    Information-theoretic tools for optical communications engineers

    Agrell Erik, and Marco Secondini. "Information-theoretic tools for optical communications engineers." 2018 IEEE IPC. IEEE, 2018

    work page 2018

  11. [11]

    Z. Zhan, M. Cantono, V. Kamalov, A

    work page

  12. [12]

    S. J. Savory, “Digital Coherent Optical

    work page