Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Platform-Aware FPGA System Architecture Generation based on MLIR
As of 23 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2309.12917.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-23T06:30:58.430688+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-05-10T00:46:07.094341Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-10T00:49:48.734289Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation a5c7f911-a7af-41c6-ad0f-fc15b5dfd688 · inbound
Demonstrating a Future for MLIR-native DSL Compilers on a NumPy-like Example cites this paper.
Demonstrating a Future for MLIR-native DSL Compilers on a NumPy-like Example Platform-Aware FPGA System Architecture Generation based on MLIR
Reference 24
- Resolution
- verified exact
- arxiv_id, observed 2026-05-10T00:49:48.736281Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-23T06:30:58.430688+00:00.