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arxiv: 2606.25095 · v1 · pith:SVMUL4WMnew · submitted 2026-06-23 · 📡 eess.SY · cs.SY

Toward Next-Generation AI Data Centers: Power Delivery Architecture Shifts, Emerging Technologies, and Challenges

Sangwhee Lee , Rafal P. Wojda , Cheol-Hee Jo , Shuntaro Inoue , Pedro Ribeiro , Gui-Jia Su , Mostak Mohammad , Himel Barua
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Nishanth Gadiyar Praveen Kumar Spencer Cochran Subho Mukherjee Whit Vinson Vandana Rallabandi Shajjad Chowdhury Burak Ozpineci
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Pith reviewed 2026-06-25 21:45 UTC · model grok-4.3

classification 📡 eess.SY cs.SY
keywords AI data centerspower delivery architectureDC/DC converterssolid-state transformerslow-voltage DC distributionarchitectural shiftspower efficiencythermal management
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The pith

AI data centers must shift through three power architecture stages enabled by high-voltage-ratio DC/DC converters, facility DC distribution, and medium-voltage solid-state transformers.

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

AI workloads are driving unprecedented power demands, current transients, and thermal stress that expose limits in traditional 48 V rack architectures, low-voltage AC distribution, and line-frequency transformer interfaces. The paper reviews the three stages of architectural shifts required to support next-generation AI data centers. It identifies three enabling technological building blocks whose advantages, technical challenges, and potential solutions are examined. Future research directions and open challenges are also discussed.

Core claim

The paper states that rapid AI growth exposes fundamental limitations in existing power systems, requiring three stages of architectural shifts in data center power delivery supported by the building blocks of high-voltage conversion-ratio DC/DC converters, facility-level low-voltage DC distribution, and medium-voltage solid-state transformers.

What carries the argument

Three enabling technological building blocks: high-voltage conversion-ratio DC/DC converters, facility-level low-voltage DC distribution, and medium-voltage solid-state transformers.

If this is right

  • Higher power densities become feasible in AI racks through improved conversion efficiency.
  • Current transients are managed with reduced voltage drops and infrastructure stress.
  • Thermal loads decrease, allowing denser compute packing without proportional cooling increases.
  • Facility-wide distribution losses drop via higher voltage levels and DC paths.
  • Grid interface stability improves through solid-state transformer capabilities.

Where Pith is reading between the lines

These are editorial extensions of the paper, not claims the author makes directly.

  • The shifts could support continued scaling of large AI training clusters beyond current power ceilings.
  • Adoption may drive broader standardization efforts for high-voltage DC safety protocols in facilities.
  • Integration with on-site renewables becomes more practical due to DC-native distribution.
  • Cost models for data center buildouts would need revision to account for new transformer and converter technologies.

Load-bearing premise

Traditional 48 V rack architectures, low-voltage AC distribution, and line-frequency transformer interfaces have fundamental limitations that AI power growth, transients, and thermal stress are exposing and that incremental fixes cannot resolve.

What would settle it

Sustained operation of existing 48 V and AC-based data center architectures at AI power densities well above current levels without efficiency collapse, excessive transients, or thermal failures would indicate the shifts are not required.

Figures

Figures reproduced from arXiv: 2606.25095 by Burak Ozpineci, Cheol-Hee Jo, Gui-Jia Su, Himel Barua, Mostak Mohammad, Nishanth Gadiyar, Pedro Ribeiro, Praveen Kumar, Rafal P. Wojda, Sangwhee Lee, Shajjad Chowdhury, Shuntaro Inoue, Spencer Cochran, Subho Mukherjee, Vandana Rallabandi, Whit Vinson.

Figure 1
Figure 1. Figure 1: Conventional modern data center power delivery architecture with in-facility LV AC busway and conventional [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. Figure 2: Data center power delivery architecture employing an in-rack LV bus (i.e., LV compute rack), a disaggregated [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. Figure 3: Shift 2 and Shift 3: Future LV DC in-facility distribution architectures for AI data centers and emerging direct [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figure 4
Figure 4. Figure 4: Typical two-stage on-tray PDN of a conventional [PITH_FULL_IMAGE:figures/full_fig_p006_4.png] view at source ↗
Figure 5
Figure 5. Figure 5: Different on-tray PDN architectures for LV IT [PITH_FULL_IMAGE:figures/full_fig_p006_5.png] view at source ↗
Figure 6
Figure 6. Figure 6: Three different types of buck-derived converter [PITH_FULL_IMAGE:figures/full_fig_p008_6.png] view at source ↗
Figure 7
Figure 7. Figure 7: Three types of hybrid SC converters. (a) Merged [PITH_FULL_IMAGE:figures/full_fig_p009_7.png] view at source ↗
Figure 8
Figure 8. Figure 8: Different types of nonresonant isolated converters. [PITH_FULL_IMAGE:figures/full_fig_p010_8.png] view at source ↗
Figure 10
Figure 10. Figure 10: DAB converters. (a) Schematic of a DAB con [PITH_FULL_IMAGE:figures/full_fig_p011_10.png] view at source ↗
Figure 12
Figure 12. Figure 12: High step-down voltage LLC converter in Con￾figuration 3 [106]. This configuration has the secondary windings magnetically decoupled. [99]. The third configuration avoids the circulating current between the paralleled secondary converters by decoupling the secondary windings, as shown in [PITH_FULL_IMAGE:figures/full_fig_p012_12.png] view at source ↗
Figure 13
Figure 13. Figure 13: Height comparison of (a) conventional and (b) [PITH_FULL_IMAGE:figures/full_fig_p013_13.png] view at source ↗
Figure 14
Figure 14. Figure 14: In-facility DC distribution architectures. (a) Unipolar DC busway architecture. (b) Bipolar DC busway [PITH_FULL_IMAGE:figures/full_fig_p015_14.png] view at source ↗
Figure 15
Figure 15. Figure 15: Schematic of TT ground configuration. (a) Unipo￾lar DC busway. (b) Bipolar DC busway. racks) are grounded: T denotes direct connection to earth, whereas N denotes grounding through the system neutral. The following subsections provide an overview of these grounding configurations. A performance comparison across four categories—personal safety, equipment safety, EMC, and fault tolerance—is summarized in … view at source ↗
Figure 19
Figure 19. Figure 19: Schematic of IT ground configuration. (a) Unipo￾lar DC busway. (b) Bipolar DC busway [PITH_FULL_IMAGE:figures/full_fig_p016_19.png] view at source ↗
Figure 18
Figure 18. Figure 18: Schematic of TN-C-S ground configuration. (a) Unipolar DC busway. (b) Bipolar DC busway. grounding conductors (each connected to the same earth point) remain physically separated, TN-S offers the best EMC performance among all TN types, as shown in [PITH_FULL_IMAGE:figures/full_fig_p016_18.png] view at source ↗
Figure 21
Figure 21. Figure 21: Implementation of equivalent MV-rated power [PITH_FULL_IMAGE:figures/full_fig_p019_21.png] view at source ↗
Figure 22
Figure 22. Figure 22: Cascaded H-bridge converter in ISOP configura [PITH_FULL_IMAGE:figures/full_fig_p019_22.png] view at source ↗
Figure 23
Figure 23. Figure 23: Various configurations of MMC-based MV-SSTs. (a) MMC-based MV-SST with MV DC intermediate bus [PITH_FULL_IMAGE:figures/full_fig_p020_23.png] view at source ↗
Figure 24
Figure 24. Figure 24: Supervisory control and load-smoothing features [PITH_FULL_IMAGE:figures/full_fig_p022_24.png] view at source ↗
Figure 25
Figure 25. Figure 25: Architectural similarities between future AI data [PITH_FULL_IMAGE:figures/full_fig_p025_25.png] view at source ↗
read the original abstract

The rapid growth of AI workloads is driving unprecedented increases in data center power demand, current transients, and thermal stress, exposing fundamental limitations in traditional 48 V rack architectures, low-voltage AC distribution, and line-frequency transformer interfaces. This paper reviews the three stages of architectural shifts required to support next-generation AI data centers and identifies three enabling technological building blocks: high-voltage conversion-ratio DC/DC converters, facility-level low-voltage DC distribution, and medium-voltage solid-state transformers. The advantages, technical challenges, and potential solutions associated with each building block are reviewed. Finally, future research directions and open challenges are discussed.

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit. Tearing a paper down is the easy half of reading it; the pith above is the substance, this is the friction.

Referee Report

0 major / 2 minor

Summary. The paper is a literature review that discusses the power delivery challenges posed by the rapid growth of AI workloads in data centers. It identifies fundamental limitations in traditional 48 V rack architectures, low-voltage AC distribution, and line-frequency transformer interfaces. The manuscript reviews three stages of architectural shifts and highlights three enabling technological building blocks: high-voltage conversion-ratio DC/DC converters, facility-level low-voltage DC distribution, and medium-voltage solid-state transformers. It examines the advantages, technical challenges, and potential solutions for each, and concludes with future research directions and open challenges.

Significance. This review synthesizes current literature on power architecture for AI data centers, providing a structured perspective on necessary shifts and key technologies. Given the increasing power demands of AI, such a survey could be valuable for guiding research in power electronics and data center infrastructure. The paper organizes existing work around specific building blocks, which may help in identifying research gaps without introducing new empirical results or derivations.

minor comments (2)
  1. [Abstract] Abstract: The abstract refers to 'three stages of architectural shifts' without naming or briefly describing them; adding this would better orient readers to the paper's structure.
  2. The mapping between the three stages and the three building blocks is not explicitly stated in the provided abstract or overview; clarifying this linkage in an early section would strengthen the central organizational claim.

Simulated Author's Rebuttal

0 responses · 0 unresolved

We thank the referee for the positive assessment of our review paper and the recommendation for minor revision. No major comments were provided in the report, so we have no specific points requiring response or revision. We appreciate the recognition that the structured perspective on power architecture shifts and enabling technologies may help identify research gaps.

Circularity Check

0 steps flagged

No circularity; pure literature review with no derivations

full rationale

The manuscript is explicitly a review paper that organizes and summarizes existing literature on power-delivery architectures for AI data centers. It identifies three stages of shifts and three building-block technologies but introduces no new equations, quantitative predictions, fitted parameters, or derivations. The central claims are descriptive summaries of prior work; no load-bearing step reduces to self-definition, self-citation chains, or fitted inputs renamed as predictions. Therefore the document contains no circular reasoning by construction.

Axiom & Free-Parameter Ledger

0 free parameters · 0 axioms · 0 invented entities

This is a review paper. No free parameters are fitted, no new axioms are introduced, and no new entities are postulated. The content rests on the assumption that the cited literature accurately describes the state of power electronics for data centers.

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Reference graph

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