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REVIEW 4 major objections 5 minor 62 references

Hardware-Enabled Fuzzy Inference: Architectures, Platforms, and Emerging Trends

T0 review · 4 major / 5 minor · reviewed 2026-08-06 · deepseek-v4-flash

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Pith's one-line read A platform-based map of fuzzy hardware reveals trade-offs, not a winner.

desk verdict A genuinely platform-centric survey with a strong embedded/TinyML chapter; the gap statistics need a documented corpus before they are citable. read the letter →

arxiv 2608.04031 v1 pith:TJRXJHLK submitted 2026-08-02 cs.AR

Amir Hossein Jalilvand , Parsa Hassani Shariat Panahi , M. Hassan Najafi This is my paper · ORCID
classification cs.AR
keywords hardwarefuzzyinferenceFPGAASICTinyMLlogiccontrollerstochasticcomputingdesignautomationsurvey
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This survey argues that the scattered literature on hardware fuzzy inference is best organized by target platform, and it builds the first such taxonomy: FPGA-based designs, ASIC/custom VLSI, and embedded/IoT/TinyML systems. Its central finding is that no platform dominates across all metrics; FPGAs offer reconfigurability and quick prototyping, ASICs deliver raw speed and energy efficiency, and microcontrollers balance low power and cost at the edge. It then quantifies where the field falls short: only 15% of reviewed works report complete resource use, 70% keep rule bases at 25 rules or fewer, most designs are hand-written register-transfer logic, and no common benchmark suite exists. If the survey's framing is right, designers get a structured basis for choosing a platform, and the research community gets a prioritized roadmap that puts standardized benchmarks and design automation before everything else.

What carries the argument

The carrying object is the platform-based taxonomy itself, which divides the literature into FPGA-based, ASIC/custom VLSI, and embedded/IoT/TinyML categories, with the four-stage fuzzy inference pipeline (fuzzification, rule-apply, aggregation, defuzzification) used as the common template for comparing how each platform maps computation onto its resources. The taxonomy makes the comparison possible, while the pipeline makes it meaningful, since each stage exposes different trade-offs, such as parallel versus sequential rule evaluation, lookup-table versus arithmetic membership functions, and exact versus approximate defuzzification, that play out differently on each substrate.

What would settle it

A systematic literature search with a documented protocol and a complete list of included papers could settle the claim: if most hardware fuzzy papers actually report resource utilization and operating frequency, or if large rule bases are common, the survey's central gap analysis would not survive.

Watch

Extended reading notes

Core claim

On the paper's own terms, the discovery is that hardware fuzzy systems are not a single technology race but three distinct platform families with different architectural constraints, and that the differences become visible only when the literature is compared platform by platform. The paper claims that this platform-centric comparison reveals a consistent pattern: FPGA implementations lead in flexibility and prototyping, ASIC and custom VLSI designs lead in performance and energy, and embedded/TinyML systems lead in cost and deployment convenience, so no single platform dominates across all metrics. It further claims that the field's progress is blocked less by circuit design than by missing infrastructure, namely the absence of standardized benchmarks, shared reporting standards, design automation, online learning support, and work on emerging memory technologies, and it identifies benchmarks and hardware-aware design tools as the two priorities that should come first.

Load-bearing premise

The quantitative gap statistics are load-bearing; if the set of papers the survey reviewed is unrepresentative or incomplete, the percentages and the resulting priorities do not follow.

Editorial extensions

If this is right

  • A designer choosing between FPGA, ASIC, and MCU for a fuzzy controller can use the three-way taxonomy as a structured shortlist, since each platform family has a distinct profile in speed, power, cost, and flexibility.
  • Standardized benchmarks with mandatory reporting of resource use, frequency, power, and accuracy would let different fuzzy engines be compared like-for-like for the first time.
  • Stochastic and unary computing, plus in-memory memristive circuits, are the paper's named routes to breaking the rule-base scalability limit.
  • The lack of an optimized fuzzy inference kernel for commodity microcontrollers makes fuzzy systems invisible to the edge-AI ecosystem, and building such a kernel would give safety-critical applications a data-independent worst-case latency.
  • Design automation and hardware-aware co-design would lower the entry barrier, since most reviewed designs are hand-written and treat hardware constraints after the algorithm is fixed.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the survey's corpus is representative, the 15% reporting rate suggests hardware fuzzy results are largely irreproducible as published, and a benchmark suite would likely change which designs are considered state of the art.
  • Because fuzzy inference has bounded, input-independent latency and kilobyte-scale memory, the paper's own comparisons hint that fuzzy engines may be a stronger fit for safety-critical TinyML than quantized neural networks, even though the authors stop short of claiming this.
  • The prioritization of benchmarks and automation over novel circuits implies that most near-term gains may come from building shared software infrastructure rather than new silicon, a testable prediction if funding and publication patterns shift accordingly.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 5 minor

Summary. This survey proposes a platform-centric taxonomy for hardware implementations of fuzzy inference systems, organizing the literature into three categories: FPGA-based, ASIC/custom VLSI, and embedded/IoT/TinyML implementations. For each category, the paper reviews architectural organization, resource mapping, trade-offs, and design challenges, and it presents a cross-platform comparison that concludes that no single platform dominates across all metrics. Based on this comparison, the paper identifies seven research gaps and prioritizes standardized benchmarks and design automation as the most urgent. The manuscript includes detailed architecture figures, summary tables, and an extended discussion of stochastic/unary computing and TinyML integration.

Significance. If the taxonomy and gap analysis are accepted, the paper provides a useful organizing framework for a fragmented literature and gives system designers a structured basis for platform selection. The survey's strengths include its broad coverage of recent FPGA, ASIC, and microcontroller work, the detailed architectural descriptions in Section III, and the explicitly identified gap of a missing fuzzy software stack for commodity microcontrollers (Section IV, item 7), which is a concrete and actionable observation. The explicit prioritization of two foundational gaps is also a constructive contribution. However, the significance is contingent on the credibility of the quantitative gap statistics in Section IV, which currently rest on an undisclosed corpus, and on the internal consistency of the taxonomy tables.

major comments (4)
  1. [Section IV (items 1-4) and Fig. 13] The quantitative gap statistics are load-bearing for the paper's central message but are not auditable. The claims that "only 15% of reviewed works report complete resource utilization data," "only 30% specify operating frequency," "fewer than 20% provide comprehensive power measurements," "70% employ rule bases of 25 rules or fewer," "65% rely on hand-written RTL," and "25% use HLS/model-based flows" are presented without any list of the reviewed papers, search protocol, inclusion/exclusion criteria, coding rubric, or date range. Since the prioritization of standardized benchmarks and design automation is justified directly from these percentages, the authors should either add a methodology appendix with the full corpus and a reproducible coding protocol, or substantially weaken the quantitative claims to qualitative observations.
  2. [Section III-C, Table IV] Table IV, captioned as a summary of embedded, IoT, and TinyML implementations, contains three rows that do not belong to that category: row [2] is an FPGA-based DC-DC boost converter, row [10] is a TSMC 90nm ASIC, and row [13] is a DE0-Nano FPGA didactic platform. This undermines the claim that the table supports the embedded/TinyML discussion and, more importantly, calls into question the consistency of the platform taxonomy itself. The rows should either be removed or the table should be relabeled/reorganized so that each entry matches the stated platform category.
  3. [Section I, Table I, and reference [22]] The paper claims to present a "novel platform-based taxonomy" and to be the "first comprehensive" platform-centric review, but it does not adequately differentiate its taxonomy from the earlier hardware taxonomy of Bosque et al. [22], which already classifies implementations as analog, digital, or mixed and distinguishes dedicated ASICs from programmable devices such as FPGAs and FPAAs. The comparison in Table I uses coarse checkmarks and does not engage with the classificatory structure of [22]. To support the novelty claim, the authors should explicitly state what the platform-centric taxonomy adds beyond [22] and previous component-oriented surveys, and should justify the claim of comprehensiveness, which currently lacks supporting search-methodology evidence.
  4. [Reference [8]] Reference [8] is a placeholder: it lists "V. Authors" as the author and "Scientific Reports, 2025" without a title, and it is cited in the Introduction as evidence that fuzzy logic remains relevant. This is not a usable citation and undermines the reliability of the survey's corpus. The authors should either replace it with a real, verifiable reference or remove it from the citation list.
minor comments (5)
  1. [Section II-D, Eq. (9)] The centroid defuzzification formula sums over K, but K is not defined in the text; please define K as the number of discretized output samples.
  2. [Section II-B] The sentence mentioning 'Dettloff et al. (1989)' gives no reference number; please add the corresponding citation for this early ASIC fuzzy processor.
  3. [Abstract] The phrase "This survey serves as a {reference for}" contains a stray LaTeX brace in the abstract; please remove it.
  4. [Section III-C] The four realization strategies (indirect interpretation, full look-up-table evaluation, indexed rule evaluation, and fixed-point Q-format arithmetic) are presented as a single paragraph; consider formatting them as a numbered or bulleted list for readability.
  5. [Section IV, item 7 and Table IV] The paper uses the density of N.R. entries in Table IV as evidence for the absence of reporting standards, but some N.R. entries may reflect omissions by the authors rather than the underlying papers. Please clarify in the text whether the N.R. entries were checked against the original sources.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the survey's taxonomy and gap analysis are an external literature review; self-citations are supporting evidence, not load-bearing premises.

full rationale

This is a survey, not a derivation chain. The central claims — the platform-based taxonomy, the cross-platform comparison, and the seven research gaps — organize external literature; they are not obtained by fitting parameters and then predicting the same quantities. The quantitative gap statistics (e.g., 'only 15% of reviewed works report complete resource utilization data') are not circular, though they are unauditable without a disclosed corpus; that is a reproducibility defect, not a definitional equivalence. Self-citations appear in the stochastic/unary computing sections ([16], [42], [50], [59], [60]) and in the TinyML footprint comparison ([57]), but they are used as supporting references to published, falsifiable experimental results, not as unverified premises that force the survey's conclusions. No equation in the paper reduces to its own input by construction, no fitted parameter is renamed as a prediction, and no 'uniqueness theorem' from the authors' prior work is invoked. The placeholder reference [8] ('V. Authors') is a completeness problem, not circularity. I therefore find no significant circularity.

Assumptions & free parameters 0 free parameters · 2 assumptions · 0 invented entities

No free parameters are fitted because the survey contains no derived equations. The only numeric quantities are aggregate statistics over an unpublished literature corpus, which are treated as domain assumptions. No new physical or architectural entities are introduced; proposed items such as a fuzzy MLPerf Tiny track are recommendations, not invented entities.

assumptions (2)
  • domain assumption The set of papers reviewed is representative of the hardware fuzzy logic literature.
    Section IV's quantitative statements depend on an unspecified corpus; representativeness is assumed rather than demonstrated.
  • domain assumption Reporting categories such as "complete resource utilization" and "operating frequency" can be unambiguously extracted from the reviewed papers.
    The gap percentages imply a reproducible coding rubric, but no rubric or extraction protocol is given in Section IV.

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Cite this review

Pith. "Pith review of Hardware-Enabled Fuzzy Inference: Architectures, Platforms, and Emerging Trends." pith.science (2026). https://pith.science/paper/TJRXJHLK

@misc{pith2026260804031,
  author       = {Pith},
  title        = {Pith review of: Hardware-Enabled Fuzzy Inference: Architectures, Platforms, and Emerging Trends},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/TJRXJHLK}},
  note         = {Machine review of arXiv:2608.04031}
}
read the original abstract

Fuzzy logic systems are widely used for intelligent decision-making under uncertainty, offering interpretability and robustness across diverse applications. However, the growing demand for real-time edge intelligence has exposed the limitations of software-based fuzzy inference: unpredictable latency, excessive power consumption, and inefficient resource utilization. This has motivated extensive research into hardware acceleration, spanning platforms from custom analog circuits and digital ASICs to reconfigurable FPGAs and ultra-low-power microcontrollers. This survey presents the first comprehensive, platform-centric review of hardware fuzzy systems, systematically organizing the literature into three principal categories: FPGA-based implementations, ASIC and custom VLSI realizations, and embedded, IoT, and TinyML platforms. For each category, we analyze architectural organization, resource mapping strategies, implementation trade-offs, and key design challenges. Our cross-platform comparative analysis reveals that no single platform dominates across all metrics. FPGAs offer flexibility and rapid prototyping, ASICs deliver peak performance and energy efficiency, while embedded and TinyML systems balance low power and cost for edge deployment. Despite significant progress, critical research gaps persist: the absence of standardized benchmarks, limited scalability of rule bases, insufficient design automation, and limited support for online learning and emerging memory technologies. We outline future directions including in-memory fuzzy computing with memristive crossbars, integration with TinyML ecosystems, explainable hardware AI, and open-source design automation. This survey serves as a {reference for} researchers and practitioners working on hardware-enabled fuzzy intelligence.

Figures

Figures reproduced from arXiv: 2608.04031 by the authors.

Figure 1
Figure 1. Platform-based taxonomy of hardware fuzzy systems, organizing [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. Four-stage inference pipeline of a fuzzy inference system: fuzzifica [PITH_FULL_IMAGE:figures/full_fig_p002_2.png] view at source ↗
Figure 3
Figure 3. Hardware organization of the Sugeno-type fuzzy MPPT controller [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figures from the paper (10 more)
Figure 4
Figure 4. Figure 4: Block diagram of the hardware-in-the-loop co-simulation platform [PITH_FULL_IMAGE:figures/full_fig_p006_4.png]
Figure 5
Figure 5. Figure 5: TS-ANFIS. Top: layered structure of the WSE TS-ANFIS model, [PITH_FULL_IMAGE:figures/full_fig_p007_5.png]
Figure 6
Figure 6. Figure 6: Hardware architecture of the CRFNN accelerator for real-time human activity recognition. Top: system-level view on the Zynq UltraScale+ ZCU104, [PITH_FULL_IMAGE:figures/full_fig_p008_6.png]
Figure 7
Figure 7. Figure 7: Internal organization of the sequenced inference engine of the IT2FLS processor. Rule-indexed multiplexers (purple) select the appropriate upper/lower [PITH_FULL_IMAGE:figures/full_fig_p008_7.png]
Figure 8
Figure 8. Figure 8: General structure of the unary bit-stream fuzzy inference engine. [PITH_FULL_IMAGE:figures/full_fig_p008_8.png]
Figure 9
Figure 9. Figure 9: Stochastic implementation of the correction accumulator. The eight directional correction streams Corr [PITH_FULL_IMAGE:figures/full_fig_p009_9.png]
Figure 10
Figure 10. Figure 10: Fuzzy fusion framework of the drone-detection system. The four per [PITH_FULL_IMAGE:figures/full_fig_p009_10.png]
Figure 11
Figure 11. Figure 11: General structure of the parallel, asynchronous, hardware-programmable PID controller. The error sample [PITH_FULL_IMAGE:figures/full_fig_p010_11.png]
Figure 12
Figure 12. Figure 12: Architecture of the EFLC integrated with the ARM Cortex-M0. The [PITH_FULL_IMAGE:figures/full_fig_p011_12.png]
Figure 13
Figure 13. Figure 13: Roadmap of the seven critical research gaps identified in this survey (red, left), the corresponding future research directions (blue, center), and the [PITH_FULL_IMAGE:figures/full_fig_p014_13.png]

Discussion (0). Continue with ORCID to comment.

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Works this paper leans on

62 extracted references · 61 canonical work pages

  1. [8]

    Fuzzy theory in healthcare: A survey, classification, issues, and future directions,

    V . Authors, “Fuzzy theory in healthcare: A survey, classification, issues, and future directions,”Scientific Reports, 2025, fuzzy logic applications in healthcare including diagnosis, monitoring, treatment recommenda- tion, and risk prediction

    work page 2025

  2. [2]

    Performance comparison between pid and fuzzy logic controllers for the hardware implementation of tradi- tional high voltage dc-dc boost converter,

    G. Nethaji and J. Kathirvelan, “Performance comparison between pid and fuzzy logic controllers for the hardware implementation of tradi- tional high voltage dc-dc boost converter,”Heliyon, vol. 10, no. 17, 2024

    work page 2024

  3. [10]

    A reconfigured architecture of mathematical morphology using fuzzy logic controller for ecg qrs detection,

    K. Neelu Kumari, L. Murali, S. Vijayabaskar, and R. Gopalakrishnan, “A reconfigured architecture of mathematical morphology using fuzzy logic controller for ecg qrs detection,”Journal of Electrical Engineering & Technology, vol. 20, no. 3, pp. 1789–1802, 2025

    work page 2025

  4. [13]

    Control applications with fpga: Case of approaching fpgas for students in an intelligent control class,

    D. Fister, A. Jakopi ˇc, and M. Trunti ˇc, “Control applications with fpga: Case of approaching fpgas for students in an intelligent control class,” Applied Sciences, vol. 15, no. 24, p. 12884, 2025

    work page 2025

  5. [22]

    Fuzzy systems, neural networks and neuro-fuzzy systems: A vision on their hardware imple- mentation and platforms over two decades,

    G. Bosque, I. del Campo, and J. Echanobe, “Fuzzy systems, neural networks and neuro-fuzzy systems: A vision on their hardware imple- mentation and platforms over two decades,”Engineering Applications of Artificial Intelligence, 2014

    work page 2014

  6. [1]

    Soft computing and fuzzy logic,

    L. A. Zadeh, “Soft computing and fuzzy logic,”IEEE Software, vol. 11, no. 6, pp. 48–56, 1994

    work page 1994

  7. [3]

    Fuzzy machine learning: A comprehensive framework and systematic review,

    J. Lu, G. Ma, and G. Zhang, “Fuzzy machine learning: A comprehensive framework and systematic review,”IEEE Transactions on Fuzzy Systems, vol. 32, no. 7, pp. 3861–3878, 2024

    work page 2024

  8. [4]

    Logic-oriented fuzzy neural networks: A survey,

    M. Alateeq and W. Pedrycz, “Logic-oriented fuzzy neural networks: A survey,”Expert Systems with Applications, vol. 255, p. 125120, 2024, comprehensive review of logic-oriented fuzzy AND/OR networks emphasizing interpretability and accuracy trade-off

    work page 2024

Show all 62 references
  1. [5]

    Advancements in data-driven evolving fuzzy and neuro-fuzzy control: A comprehensive survey,

    M. M. Ferdaus, M. Pratama, S. G. Anavatti, and M. A. Garratt, “Advancements in data-driven evolving fuzzy and neuro-fuzzy control: A comprehensive survey,”Applied Soft Computing, 2025, evolving fuzzy and neuro-fuzzy controllers with real-time adaptive capabilities

    2025

  2. [6]

    Intelligent and fuzzy systems: Intelligent industrial infor- matics and efficient networks,

    C. Kahraman, S. C. Onar, S. Cebi, B. Oztaysi, A. C. Tolga, and I. Ucal Sari, “Intelligent and fuzzy systems: Intelligent industrial infor- matics and efficient networks,”Lecture Notes in Networks and Systems, vol. 1089, 2024, fuzzy logic applications in Industry 4.0, industria...

    2024

  3. [7]

    Synthesizing complexity: Trends, challenges, and future directions in fuzzy-based multicriteria decision-making (fmcdm) methods,

    N. Akbari-Gharalari, Y . Pourrahimian, and F. Nezhadshahmohammad, “Synthesizing complexity: Trends, challenges, and future directions in fuzzy-based multicriteria decision-making (fmcdm) methods,”Applied Soft Computing, vol. 164, p. 111136, 2024, fuzzy-based multicriteria deci...

    2024

  4. [9]

    Fpga-based fuzzy logic controllers applied to the mppt of pv panels—a systematic review,

    T. M. de Lima and J. A. C. B. Oliveira, “Fpga-based fuzzy logic controllers applied to the mppt of pv panels—a systematic review,”IEEE Transactions on Fuzzy Systems, vol. 32, no. 8, pp. 4260–4269, 2024

    2024

  5. [11]

    High speed, low power for qrs complex detection using a convolutional neural network,

    D. T. Tran, “High speed, low power for qrs complex detection using a convolutional neural network,”VNUHCM Journal of Science and Technology Development, vol. 29, no. 2, 2026

    2026

  6. [12]

    Parallel, asynchronous, fuzzy logic systems realized in cmos technology,

    T. Tala ´ska, “Parallel, asynchronous, fuzzy logic systems realized in cmos technology,”Advances in Computational Mathematics, vol. 45, no. 4, pp. 1807–1823, 2019

    2019

  7. [14]

    The design of embedded fuzzy logic controller for autonomous mobile robots,

    Y . Jeong, W. S. Jeong, J. Y . Shin, and S. E. Lee, “The design of embedded fuzzy logic controller for autonomous mobile robots,” in2023 20th International SoC Design Conference (ISOCC). IEEE, 2023, pp. 145–146

    2023

  8. [15]

    A stochastic logic-based fuzzy logic controller: First experimental results of a novel architecture,

    A. Odry, V . L. Tadic, and P. Odry, “A stochastic logic-based fuzzy logic controller: First experimental results of a novel architecture,”IEEE Access, vol. 9, pp. 29 895–29 920, 2021

    2021

  9. [16]

    Fuzzy-logic using unary bit-stream processing,

    A. H. Jalilvand, M. H. Najafi, and M. Fazeli, “Fuzzy-logic using unary bit-stream processing,” in2020 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2020, pp. 1–5

    2020

  10. [17]

    Fpga-based fuzzy logic: Design and applications - a review,

    N. Sulaiman, Z. A. Obaid, M. H. Marhaban, and M. N. Hamidon, “Fpga-based fuzzy logic: Design and applications - a review,”IAENG International Journal of Engineering and Technology, vol. 1, no. 5, pp. 1793–8236, 2009

    2009

  11. [18]

    Vlsi architecture of fuzzy logic hardware implementation: a review,

    A. M. Murshid, S. A. Loan, S. A. Abbasi, and A. R. M. Alamoud, “Vlsi architecture of fuzzy logic hardware implementation: a review,” International Journal of Fuzzy Systems, vol. 13, no. 2, pp. 74–88, 2011

    2011

  12. [19]

    Hardware implementation of fuzzy processors: A review,

    N. Afzal, “Hardware implementation of fuzzy processors: A review,”In- ternational Journal of Engineering Research and Development (IJERD), vol. 13, no. 2, pp. 55–61, Feb. 2017

    2017

  13. [20]

    Fuzzy hardware tool: An adaptable tool to facilitate the implementation of fuzzy inference systems in hardware,

    R. Valdez, Y . Maldonado, and J. A. Quevedo, “Fuzzy hardware tool: An adaptable tool to facilitate the implementation of fuzzy inference systems in hardware,”Electronics, vol. 12, no. 13, p. 2853, 2023

    2023

  14. [21]

    Baturone, A

    I. Baturone, A. Barriga, C. Jimenez-Fernandez, D. R. Lopez, and S. Sanchez-Solano,Microelectronic Design of Fuzzy Logic-Based Sys- tems. CRC Press, 2000

    2000

  15. [23]

    Teodorescu and A

    H.-N. Teodorescu and A. Kandel, Eds.,Hardware Implementation of Intelligent Systems, ser. Studies in Fuzziness and Soft Computing. Physica-Verlag, 2001, vol. 74

    2001

  16. [24]

    Statistical evaluation of a fuzzy control system implemented on a low-cost microcontroller for wheelchair applications,

    L. F. F. Souzaet al., “Statistical evaluation of a fuzzy control system implemented on a low-cost microcontroller for wheelchair applications,” Disability and Rehabilitation: Assistive Technology, 2025

    2025

  17. [25]

    Utilizing raspberry-pi 3 to implement fuzzy logic controller optimized by genetic algorithm,

    A. I. Nasser, H. M. Kadhim, and E. A. Hussien, “Utilizing raspberry-pi 3 to implement fuzzy logic controller optimized by genetic algorithm,” Iraqi Journal for Electrical and Electronic Engineering, vol. 21, no. 2, p. 99, 2025

    2025

  18. [26]

    Fuzzy logic approach for controlling uncertain and nonlinear systems: a comprehensive review of applications and advances,

    H. H. Tang and N. S. Ahmad, “Fuzzy logic approach for controlling uncertain and nonlinear systems: a comprehensive review of applications and advances,”Systems Science & Control Engineering, vol. 12, no. 1, p. 2394429, 2024, fuzzy logic in energy harvesting, ambient conditioni...

    2024

  19. [27]

    Design and implementation of reconfigurable mppt fuzzy controller for photovoltaic systems,

    K. Loukil, H. Abbes, H. Abid, M. Abid, and A. Toumi, “Design and implementation of reconfigurable mppt fuzzy controller for photovoltaic systems,”Ain Shams Engineering Journal, vol. 11, no. 2, pp. 319–328, 2020

    2020

  20. [28]

    Fuzzy-based mppt algorithm implementation on fpga chip for multi-channel photo- voltaic system,

    H. Abbes, H. Abid, K. Loukil, M. Abid, and A. Toumi, “Fuzzy-based mppt algorithm implementation on fpga chip for multi-channel photo- voltaic system,”International Journal of Reconfigurable and Embedded Systems, vol. 11, no. 1, p. 49, 2022

    2022

  21. [29]

    Hardware resources minimization of bell membership function based on fpga,

    N. Habeeb and S. Abbas, “Hardware resources minimization of bell membership function based on fpga,”Engineering and Technology Journal, vol. 43, no. 2, pp. 137–148, 2025

    2025

  22. [30]

    A programmable cmos-based fuzzy membership function for bell-shaped curves,

    H. Sefraoui, S. Amakawa, A. Derkaoui, and A. Ziyyat, “A programmable cmos-based fuzzy membership function for bell-shaped curves,” in 2025 International Conference on Electrical, Computer and Energy Technologies (ICECET). IEEE, 2025, pp. 1–5, paris, France, 3-6 July 2025

    2025

  23. [31]

    Design and characterization of cmos differential pair circuits for membership func- tion generation with noise analysis in fuzzy logic systems,

    H. Sefraoui, S. Amakawa, A. Derkaoui, and A. Ziyyat, “Design and characterization of cmos differential pair circuits for membership func- tion generation with noise analysis in fuzzy logic systems,”Scientific African, p. e03220, 2026

    2026

  24. [32]

    Development of embedded fuzzy control using reconfigurable fpga technology,

    A. A. Nada and M. A. Bayoumi, “Development of embedded fuzzy control using reconfigurable fpga technology,”Automatika: ˇ casopis za automatiku, mjerenje, elektroniku, raˇ cunarstvo i komunikacije, vol. 65, no. 2, pp. 609–626, 2024

    2024

  25. [33]

    Fpga based intelli- gent embedded system for predicting the productivity using fuzzy logic,

    G. Prabakaran, D. Vaithiyanathan, and M. Ganesan, “Fpga based intelli- gent embedded system for predicting the productivity using fuzzy logic,” Sustainable computing: Informatics and systems, vol. 35, p. 100749, 2022

    2022

  26. [34]

    A novel hardware implemented programmable controller adapted to cooperate with ai tuning algorithms in real time systems,

    T. Tala ´ska, Z. Długosz, and R. Długosz, “A novel hardware implemented programmable controller adapted to cooperate with ai tuning algorithms in real time systems,”Journal of Computational and Applied Mathemat- ics, vol. 428, p. 115162, 2023

    2023

  27. [35]

    Fpga-based implementation of fuzzy logic dtc for induction motor drive fed by matrix converter,

    R. K. Swami, V . Kumar, and R. Joshi, “Fpga-based implementation of fuzzy logic dtc for induction motor drive fed by matrix converter,”IETE Journal of research, vol. 68, no. 2, pp. 1418–1426, 2022

    2022

  28. [36]

    A new hardware implementation of fuzzy logic control based on fpga for shunt active filter: Design and co-simulation,

    J. Koko, B. O. Essama, J. N. Bisse, J. Atangana, and S. N. Essiane, “A new hardware implementation of fuzzy logic control based on fpga for shunt active filter: Design and co-simulation,”World Journal of Artificial Intelligence and Robotics Research, vol. 14, 2025

    2025

  29. [37]

    Implementation of a convolutional recurrent fuzzy neural network model on a high- performance field-programmable gate array accelerator for real-time human activity recognition,

    X.-Q. Lin, C.-J. Lin, J.-Y . Jhang, and S.-F. Liang, “Implementation of a convolutional recurrent fuzzy neural network model on a high- performance field-programmable gate array accelerator for real-time human activity recognition,”International Journal of Fuzzy Systems, pp. 1...

    2025

  30. [38]

    Zynq fpga for hardware co-simulation of takagi-sugeno neuro-fuzzy for mppt algorithm incorporating sensorless wind speed estimation in grid-connected wind system,

    M. Hermassi, S. Krim, Y . Kraiem, and M. A. Hajjaji, “Zynq fpga for hardware co-simulation of takagi-sugeno neuro-fuzzy for mppt algorithm incorporating sensorless wind speed estimation in grid-connected wind system,”Journal of Engineering Research, 2024

    2024

  31. [39]

    A mem- ristive fuzzy neural network with applications to classification task: A programmable circuit system,

    N. Jiang, M. Jiang, J. Xie, H. Huang, D. Li, and Z. Zeng, “A mem- ristive fuzzy neural network with applications to classification task: A programmable circuit system,”Neural Networks, p. 108547, 2026

    2026

  32. [40]

    Neuro-fuzzy architectures for interpretable ai: A comprehen- sive survey and research outlook,

    S. Singh, “Neuro-fuzzy architectures for interpretable ai: A comprehen- sive survey and research outlook,”Preprints, 2025, published online: 16 June 2025

    2025

  33. [41]

    Design of compressor-based multipliers using simulated annealing for arithmetic logic unit,

    Y . Pavitra and J. Manikandan, “Design of compressor-based multipliers using simulated annealing for arithmetic logic unit,”Neural Computing and Applications, vol. 37, no. 33, pp. 27 747–27 757, 2025

    2025

  34. [42]

    A low-cost stochastic computing-based fuzzy filtering for image noise reduction,

    S. N. Estiri, A. H. Jalilvand, S. Naderi, M. H. Najafi, and M. Fazeli, “A low-cost stochastic computing-based fuzzy filtering for image noise reduction,” in2022 IEEE 13th International Green and Sustainable Computing Conference (IGSC), 2022, pp. 1–6

    2022

  35. [43]

    Fpga implementation of a interval type-2 fuzzy inference for quadrotor attitude control,

    T. Matusi, T. Oda, C. Yukawa, T. Yasunaga, N. Saito, A. Hirata, and L. Barolli, “Fpga implementation of a interval type-2 fuzzy inference for quadrotor attitude control,” inInternational Conference on Emerging Internetworking, Data & Web Technologies. Springer, 2022, pp. 357– 365

    2022

  36. [44]

    Robust fuzzy controller design with fpga implementation for matrix converter based induction motor drive,

    R. Meghwal, V . K. Yadav, and M. Vardia, “Robust fuzzy controller design with fpga implementation for matrix converter based induction motor drive,”e-Prime-Advances in Electrical Engineering, Electronics and Energy, vol. 10, p. 100752, 2024

    2024

  37. [45]

    Implementation of fuzzy logic controller algorithms with mf optimization on fpga,

    S. Ahmed and K. Yahia, “Implementation of fuzzy logic controller algorithms with mf optimization on fpga,”Statistics, Optimization & Information Computing, vol. 12, no. 1, pp. 182–199, 2024

    2024

  38. [46]

    A recon- figurable fuzzy-logic audio-visual fusion implementation for area threat identification,

    T. Srivastava, S. Bhuvana, P. Shenoy, and R. Ratnakumar, “A recon- figurable fuzzy-logic audio-visual fusion implementation for area threat identification,”IEEE Access, 2026

    2026

  39. [47]

    Design of a fpga accelerator for the five fuzzy interpolation method,

    R. Bartók and J. Vásárhelyi, “Design of a fpga accelerator for the five fuzzy interpolation method,”International Journal of Computer Applications in Technology, vol. 68, no. 4, pp. 321–331, 2022

    2022

  40. [48]

    Performing Stochastic Computation Deterministically,

    M. H. Najafi, D. Jenson, D. J. Lilja, and M. Riedel, “Performing Stochastic Computation Deterministically,”IEEE Tran. on Very Large 17 Scale Integration (VLSI) Systems, vol. 27, no. 12, pp. 2925–2938, Dec 2019

    2019

  41. [49]

    Fuzzy logic-driven asic optimization for neural network acceleration,

    R. Imamguluyev, A. Hasanova, G. Azizova, U. Poladova, V . Salimova, and E. Gasimov, “Fuzzy logic-driven asic optimization for neural network acceleration,” in2025 International Conference on Machine Learning and Autonomous Systems (ICMLAS). IEEE, 2025, pp. 1030– 1035

    2025

  42. [50]

    Method and architecture for fuzzy-logic using unary processing,

    M. Najafi, A. H. Jalilvand, and M. Fazeli, “Method and architecture for fuzzy-logic using unary processing,” Jan. 6 2026, uS Patent 12,518,186

    2026

  43. [51]

    Design and implementation of a fuzzy logic algorithm embedded in a microcontroller for combustion applications,

    A. Martínez-González, J. C. I. Zamarripa-Ramírez, O. F. Ortega- Martínez, and D. Moreno-Hernández, “Design and implementation of a fuzzy logic algorithm embedded in a microcontroller for combustion applications,”International Journal of Fuzzy Systems, 2025

    2025

  44. [52]

    Real-time implementation of a microcontroller-based coupled-tank water level control system with feedback linearization and fuzzy logic controller algorithms,

    S. Sahinet al., “Real-time implementation of a microcontroller-based coupled-tank water level control system with feedback linearization and fuzzy logic controller algorithms,”Sensors, vol. 25, no. 5, p. 1279, 2025

    2025

  45. [53]

    Real-time edge deployment of ANFIS for IoT energy optimization,

    J. M. Lopez-Guede, “Real-time edge deployment of ANFIS for IoT energy optimization,”Processes, vol. 14, no. 6, p. 1004, 2026

    2026

  46. [54]

    Adaptive microprocessor-based interval type-2 fuzzy logic controller design for DC micro-motor control considering hardware limitations,

    Y . L. Karnavaset al., “Adaptive microprocessor-based interval type-2 fuzzy logic controller design for DC micro-motor control considering hardware limitations,”Energies, vol. 18, no. 21, p. 5781, 2025

    2025

  47. [55]

    Wireless sensor networks for smart homes: A fuzzy-based solution for an energy-effective duty cycle,

    G. Pau and V . M. Salerno, “Wireless sensor networks for smart homes: A fuzzy-based solution for an energy-effective duty cycle,”Electronics, vol. 8, no. 2, p. 131, 2019

    2019

  48. [56]

    MCUNet: Tiny deep learning on IoT devices,

    J. Lin, W.-M. Chen, Y . Lin, J. Cohn, C. Gan, and S. Han, “MCUNet: Tiny deep learning on IoT devices,” inAdvances in Neural Information Processing Systems (NeurIPS), 2020

    2020

  49. [57]

    Line segment detection on a microcontroller: Output representations and integer quantization under tight memory constraints,

    P. Hassani Shariat Panahi, A. H. Jalilvand, and M. H. Najafi, “Line segment detection on a microcontroller: Output representations and integer quantization under tight memory constraints,”arXiv preprint arXiv:2607.06600, 2026. [Online]. Available: https://arxiv.org/abs/2607. 06600

    2026 arXiv

  50. [58]

    MLPerf Tiny benchmark,

    C. Banbury, V . J. Reddi, P. Torelli, J. Holleman, N. Jeffries, C. Kiraly et al., “MLPerf Tiny benchmark,” inProceedings of the Neural Infor- mation Processing Systems Track on Datasets and Benchmarks, 2021

    2021

  51. [59]

    Adversarial attack bypass by stochastic computing,

    F. S. Banitaba, S. Aygun, M. S. Moghadam, A. Jalilvand, B. Li, and M. H. Najafi, “Adversarial attack bypass by stochastic computing,”IEEE Embedded Systems Letters, vol. 17, no. 4, pp. 234–239, 2025

    2025

  52. [60]

    A fast and low-cost comparison-free sorting engine with unary computing: Late breaking results,

    A. H. Jalilvand, S. N. Estiri, S. Naderi, M. H. Najafi, and M. Imani, “A fast and low-cost comparison-free sorting engine with unary computing: Late breaking results,” inProceedings of the 59th ACM/IEEE Design Automation Conference, 2022, pp. 1390–1391

    2022

  53. [61]

    CMSIS-NN: Efficient neural network kernels for Arm Cortex-M CPUs,

    L. Lai, N. Suda, and V . Chandra, “CMSIS-NN: Efficient neural network kernels for Arm Cortex-M CPUs,”arXiv preprint arXiv:1801.06601, 2018. Amir Hossein Jalilvandreceived his B.Sc. de- gree in Computer Engineering from Bu-Ali Sina University, Hamadan, Iran, and the M.Sc. degre...

    2018 arXiv

  54. [2018]

    His research interests include stochastic and approxi- mate computing, unary processing, in-memory com- puting, and hyperdimensional computing

    He is currently an Associate Professor at the Electrical, Computer, and Systems Engineering Department at Case Western Reserve University. His research interests include stochastic and approxi- mate computing, unary processing, in-memory com- puting, and hyperdimensional compu...

    2024

Pith tools

Reviewed August 6, 2026 · model on record in the stance chip above.