Po-Hsuan Huang

Identifiers

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Papers (1)

1. Exploring LLM-based Verilog Code Generation with Data-Efficient Fine-Tuning and Testbench Automation cs.AR · 2026 · author #2

Mentions

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Frequent Coauthors

• Cheng Liang 1 shared papers
• Chia-Heng Tu 1 shared papers
• Mu-Chi Chen 1 shared papers
• Shao-Chun Ho 1 shared papers
• Shih-Hao Hung 1 shared papers
• Yen-Fu Liu 1 shared papers
• Yu-Hung Kao 1 shared papers
• Yu-Kai Hung 1 shared papers