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/ Ajay Goyal
Ajay Goyal
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Ajay Goyal
0.60 · backfill
Papers (1)
Generic System Verilog Universal Verification Methodology based Reusable Verification Environment for Efficient Verification of Image Signal Processing IPs/SoCs
cs.OH · 2013 · author #4
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1301.2858
#4 · backfill · confidence 0.70
Ajay Goyal
Frequent Coauthors
Abhishek Jain
1 shared papers
Giuseppe Bonanno
1 shared papers
Hima Gupta
1 shared papers