A RISC-V Vector extension with four quantum instructions and a hardware halt-resume protocol achieves up to 2.52× speedup over a prior custom QCP while addressing 128 qubits per instruction on FPGA.
A variational eigenvalue solver on a photonic chip,
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Vectorizing Quantum Control: A RISC-V Vector Extension Architecture for Scalable Qubit Systems
A RISC-V Vector extension with four quantum instructions and a hardware halt-resume protocol achieves up to 2.52× speedup over a prior custom QCP while addressing 128 qubits per instruction on FPGA.