Adjusting quantum gate timing via scheduling suppresses idling errors and improves accuracy in simulations and hardware experiments without added gates, supported by an analytical density-matrix derivation.
Routing-based technique for defect mitigation in quantum error correction.Phys
1 Pith paper cite this work. Polarity classification is still indexing.
1
Pith paper citing it
fields
quant-ph 1years
2026 1verdicts
UNVERDICTED 1representative citing papers
citing papers explorer
-
Idling error suppression through gate scheduling
Adjusting quantum gate timing via scheduling suppresses idling errors and improves accuracy in simulations and hardware experiments without added gates, supported by an analytical density-matrix derivation.